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Merge pull request #8 from pwpiwi/master
[proxmark3-svn] / armsrc / iso14443a.c
1 //-----------------------------------------------------------------------------
2 // Merlok - June 2011, 2012
3 // Gerhard de Koning Gans - May 2008
4 // Hagen Fritsch - June 2010
5 //
6 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
7 // at your option, any later version. See the LICENSE.txt file for the text of
8 // the license.
9 //-----------------------------------------------------------------------------
10 // Routines to support ISO 14443 type A.
11 //-----------------------------------------------------------------------------
12
13 #include "proxmark3.h"
14 #include "apps.h"
15 #include "util.h"
16 #include "string.h"
17 #include "cmd.h"
18
19 #include "iso14443crc.h"
20 #include "iso14443a.h"
21 #include "crapto1.h"
22 #include "mifareutil.h"
23
24 static uint32_t iso14a_timeout;
25 uint8_t *trace = (uint8_t *) BigBuf+TRACE_OFFSET;
26 int rsamples = 0;
27 int traceLen = 0;
28 int tracing = TRUE;
29 uint8_t trigger = 0;
30 // the block number for the ISO14443-4 PCB
31 static uint8_t iso14_pcb_blocknum = 0;
32
33 //
34 // ISO14443 timing:
35 //
36 // minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles
37 #define REQUEST_GUARD_TIME (7000/16 + 1)
38 // minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles
39 #define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1)
40 // bool LastCommandWasRequest = FALSE;
41
42 //
43 // Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz)
44 //
45 // When the PM acts as reader and is receiving tag data, it takes
46 // 3 ticks delay in the AD converter
47 // 16 ticks until the modulation detector completes and sets curbit
48 // 8 ticks until bit_to_arm is assigned from curbit
49 // 8*16 ticks for the transfer from FPGA to ARM
50 // 4*16 ticks until we measure the time
51 // - 8*16 ticks because we measure the time of the previous transfer
52 #define DELAY_AIR2ARM_AS_READER (3 + 16 + 8 + 8*16 + 4*16 - 8*16)
53
54 // When the PM acts as a reader and is sending, it takes
55 // 4*16 ticks until we can write data to the sending hold register
56 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
57 // 8 ticks until the first transfer starts
58 // 8 ticks later the FPGA samples the data
59 // 1 tick to assign mod_sig_coil
60 #define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1)
61
62 // When the PM acts as tag and is receiving it takes
63 // 2 ticks delay in the RF part (for the first falling edge),
64 // 3 ticks for the A/D conversion,
65 // 8 ticks on average until the start of the SSC transfer,
66 // 8 ticks until the SSC samples the first data
67 // 7*16 ticks to complete the transfer from FPGA to ARM
68 // 8 ticks until the next ssp_clk rising edge
69 // 4*16 ticks until we measure the time
70 // - 8*16 ticks because we measure the time of the previous transfer
71 #define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16)
72
73 // The FPGA will report its internal sending delay in
74 uint16_t FpgaSendQueueDelay;
75 // the 5 first bits are the number of bits buffered in mod_sig_buf
76 // the last three bits are the remaining ticks/2 after the mod_sig_buf shift
77 #define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1)
78
79 // When the PM acts as tag and is sending, it takes
80 // 4*16 ticks until we can write data to the sending hold register
81 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
82 // 8 ticks until the first transfer starts
83 // 8 ticks later the FPGA samples the data
84 // + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf)
85 // + 1 tick to assign mod_sig_coil
86 #define DELAY_ARM2AIR_AS_TAG (4*16 + 8*16 + 8 + 8 + DELAY_FPGA_QUEUE + 1)
87
88 // When the PM acts as sniffer and is receiving tag data, it takes
89 // 3 ticks A/D conversion
90 // 14 ticks to complete the modulation detection
91 // 8 ticks (on average) until the result is stored in to_arm
92 // + the delays in transferring data - which is the same for
93 // sniffing reader and tag data and therefore not relevant
94 #define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 14 + 8)
95
96 // When the PM acts as sniffer and is receiving reader data, it takes
97 // 2 ticks delay in analogue RF receiver (for the falling edge of the
98 // start bit, which marks the start of the communication)
99 // 3 ticks A/D conversion
100 // 8 ticks on average until the data is stored in to_arm.
101 // + the delays in transferring data - which is the same for
102 // sniffing reader and tag data and therefore not relevant
103 #define DELAY_READER_AIR2ARM_AS_SNIFFER (2 + 3 + 8)
104
105 //variables used for timing purposes:
106 //these are in ssp_clk cycles:
107 uint32_t NextTransferTime;
108 uint32_t LastTimeProxToAirStart;
109 uint32_t LastProxToAirDuration;
110
111
112
113 // CARD TO READER - manchester
114 // Sequence D: 11110000 modulation with subcarrier during first half
115 // Sequence E: 00001111 modulation with subcarrier during second half
116 // Sequence F: 00000000 no modulation with subcarrier
117 // READER TO CARD - miller
118 // Sequence X: 00001100 drop after half a period
119 // Sequence Y: 00000000 no drop
120 // Sequence Z: 11000000 drop at start
121 #define SEC_D 0xf0
122 #define SEC_E 0x0f
123 #define SEC_F 0x00
124 #define SEC_X 0x0c
125 #define SEC_Y 0x00
126 #define SEC_Z 0xc0
127
128 const uint8_t OddByteParity[256] = {
129 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
130 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
131 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
132 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
133 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
134 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
135 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
136 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
137 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
138 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
139 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
140 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
141 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
142 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
143 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
144 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1
145 };
146
147
148 void iso14a_set_trigger(bool enable) {
149 trigger = enable;
150 }
151
152 void iso14a_clear_trace() {
153 memset(trace, 0x44, TRACE_SIZE);
154 traceLen = 0;
155 }
156
157 void iso14a_set_tracing(bool enable) {
158 tracing = enable;
159 }
160
161 void iso14a_set_timeout(uint32_t timeout) {
162 iso14a_timeout = timeout;
163 }
164
165 //-----------------------------------------------------------------------------
166 // Generate the parity value for a byte sequence
167 //
168 //-----------------------------------------------------------------------------
169 byte_t oddparity (const byte_t bt)
170 {
171 return OddByteParity[bt];
172 }
173
174 uint32_t GetParity(const uint8_t * pbtCmd, int iLen)
175 {
176 int i;
177 uint32_t dwPar = 0;
178
179 // Generate the parity bits
180 for (i = 0; i < iLen; i++) {
181 // and save them to a 32Bit word
182 dwPar |= ((OddByteParity[pbtCmd[i]]) << i);
183 }
184 return dwPar;
185 }
186
187 void AppendCrc14443a(uint8_t* data, int len)
188 {
189 ComputeCrc14443(CRC_14443_A,data,len,data+len,data+len+1);
190 }
191
192 // The function LogTrace() is also used by the iClass implementation in iClass.c
193 bool RAMFUNC LogTrace(const uint8_t * btBytes, uint8_t iLen, uint32_t timestamp, uint32_t dwParity, bool bReader)
194 {
195 // Return when trace is full
196 if (traceLen + sizeof(timestamp) + sizeof(dwParity) + iLen >= TRACE_SIZE) {
197 tracing = FALSE; // don't trace any more
198 return FALSE;
199 }
200
201 // Trace the random, i'm curious
202 trace[traceLen++] = ((timestamp >> 0) & 0xff);
203 trace[traceLen++] = ((timestamp >> 8) & 0xff);
204 trace[traceLen++] = ((timestamp >> 16) & 0xff);
205 trace[traceLen++] = ((timestamp >> 24) & 0xff);
206 if (!bReader) {
207 trace[traceLen - 1] |= 0x80;
208 }
209 trace[traceLen++] = ((dwParity >> 0) & 0xff);
210 trace[traceLen++] = ((dwParity >> 8) & 0xff);
211 trace[traceLen++] = ((dwParity >> 16) & 0xff);
212 trace[traceLen++] = ((dwParity >> 24) & 0xff);
213 trace[traceLen++] = iLen;
214 if (btBytes != NULL && iLen != 0) {
215 memcpy(trace + traceLen, btBytes, iLen);
216 }
217 traceLen += iLen;
218 return TRUE;
219 }
220
221 //=============================================================================
222 // ISO 14443 Type A - Miller decoder
223 //=============================================================================
224 // Basics:
225 // This decoder is used when the PM3 acts as a tag.
226 // The reader will generate "pauses" by temporarily switching of the field.
227 // At the PM3 antenna we will therefore measure a modulated antenna voltage.
228 // The FPGA does a comparison with a threshold and would deliver e.g.:
229 // ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 .......
230 // The Miller decoder needs to identify the following sequences:
231 // 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0")
232 // 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information")
233 // 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1")
234 // Note 1: the bitstream may start at any time. We therefore need to sync.
235 // Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence.
236 //-----------------------------------------------------------------------------
237 static tUart Uart;
238
239 // Lookup-Table to decide if 4 raw bits are a modulation.
240 // We accept two or three consecutive "0" in any position with the rest "1"
241 const bool Mod_Miller_LUT[] = {
242 TRUE, TRUE, FALSE, TRUE, FALSE, FALSE, FALSE, FALSE,
243 TRUE, TRUE, FALSE, FALSE, TRUE, FALSE, FALSE, FALSE
244 };
245 #define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x00F0) >> 4])
246 #define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x000F)])
247
248 void UartReset()
249 {
250 Uart.state = STATE_UNSYNCD;
251 Uart.bitCount = 0;
252 Uart.len = 0; // number of decoded data bytes
253 Uart.shiftReg = 0; // shiftreg to hold decoded data bits
254 Uart.parityBits = 0; //
255 Uart.twoBits = 0x0000; // buffer for 2 Bits
256 Uart.highCnt = 0;
257 Uart.startTime = 0;
258 Uart.endTime = 0;
259 }
260
261
262 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
263 static RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time)
264 {
265
266 Uart.twoBits = (Uart.twoBits << 8) | bit;
267
268 if (Uart.state == STATE_UNSYNCD) { // not yet synced
269 if (Uart.highCnt < 7) { // wait for a stable unmodulated signal
270 if (Uart.twoBits == 0xffff) {
271 Uart.highCnt++;
272 } else {
273 Uart.highCnt = 0;
274 }
275 } else {
276 Uart.syncBit = 0xFFFF; // not set
277 // look for 00xx1111 (the start bit)
278 if ((Uart.twoBits & 0x6780) == 0x0780) Uart.syncBit = 7;
279 else if ((Uart.twoBits & 0x33C0) == 0x03C0) Uart.syncBit = 6;
280 else if ((Uart.twoBits & 0x19E0) == 0x01E0) Uart.syncBit = 5;
281 else if ((Uart.twoBits & 0x0CF0) == 0x00F0) Uart.syncBit = 4;
282 else if ((Uart.twoBits & 0x0678) == 0x0078) Uart.syncBit = 3;
283 else if ((Uart.twoBits & 0x033C) == 0x003C) Uart.syncBit = 2;
284 else if ((Uart.twoBits & 0x019E) == 0x001E) Uart.syncBit = 1;
285 else if ((Uart.twoBits & 0x00CF) == 0x000F) Uart.syncBit = 0;
286 if (Uart.syncBit != 0xFFFF) {
287 Uart.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
288 Uart.startTime -= Uart.syncBit;
289 Uart.endTime = Uart.startTime;
290 Uart.state = STATE_START_OF_COMMUNICATION;
291 }
292 }
293
294 } else {
295
296 if (IsMillerModulationNibble1(Uart.twoBits >> Uart.syncBit)) {
297 if (IsMillerModulationNibble2(Uart.twoBits >> Uart.syncBit)) { // Modulation in both halves - error
298 UartReset();
299 Uart.highCnt = 6;
300 } else { // Modulation in first half = Sequence Z = logic "0"
301 if (Uart.state == STATE_MILLER_X) { // error - must not follow after X
302 UartReset();
303 Uart.highCnt = 6;
304 } else {
305 Uart.bitCount++;
306 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
307 Uart.state = STATE_MILLER_Z;
308 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 6;
309 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
310 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
311 Uart.parityBits <<= 1; // make room for the parity bit
312 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
313 Uart.bitCount = 0;
314 Uart.shiftReg = 0;
315 }
316 }
317 }
318 } else {
319 if (IsMillerModulationNibble2(Uart.twoBits >> Uart.syncBit)) { // Modulation second half = Sequence X = logic "1"
320 Uart.bitCount++;
321 Uart.shiftReg = (Uart.shiftReg >> 1) | 0x100; // add a 1 to the shiftreg
322 Uart.state = STATE_MILLER_X;
323 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 2;
324 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
325 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
326 Uart.parityBits <<= 1; // make room for the new parity bit
327 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
328 Uart.bitCount = 0;
329 Uart.shiftReg = 0;
330 }
331 } else { // no modulation in both halves - Sequence Y
332 if (Uart.state == STATE_MILLER_Z || Uart.state == STATE_MILLER_Y) { // Y after logic "0" - End of Communication
333 Uart.state = STATE_UNSYNCD;
334 if(Uart.len == 0 && Uart.bitCount > 0) { // if we decoded some bits
335 Uart.shiftReg >>= (9 - Uart.bitCount); // add them to the output
336 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
337 Uart.parityBits <<= 1; // no parity bit - add "0"
338 Uart.bitCount--; // last "0" was part of the EOC sequence
339 }
340 return TRUE;
341 }
342 if (Uart.state == STATE_START_OF_COMMUNICATION) { // error - must not follow directly after SOC
343 UartReset();
344 Uart.highCnt = 6;
345 } else { // a logic "0"
346 Uart.bitCount++;
347 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
348 Uart.state = STATE_MILLER_Y;
349 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
350 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
351 Uart.parityBits <<= 1; // make room for the parity bit
352 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
353 Uart.bitCount = 0;
354 Uart.shiftReg = 0;
355 }
356 }
357 }
358 }
359
360 }
361
362 return FALSE; // not finished yet, need more data
363 }
364
365
366
367 //=============================================================================
368 // ISO 14443 Type A - Manchester decoder
369 //=============================================================================
370 // Basics:
371 // This decoder is used when the PM3 acts as a reader.
372 // The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage
373 // at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following:
374 // ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 .......
375 // The Manchester decoder needs to identify the following sequences:
376 // 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication")
377 // 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0
378 // 8 ticks unmodulated: Sequence F = end of communication
379 // 8 ticks modulated: A collision. Save the collision position and treat as Sequence D
380 // Note 1: the bitstream may start at any time. We therefore need to sync.
381 // Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only)
382 static tDemod Demod;
383
384 // Lookup-Table to decide if 4 raw bits are a modulation.
385 // We accept three or four "1" in any position
386 const bool Mod_Manchester_LUT[] = {
387 FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, TRUE,
388 FALSE, FALSE, FALSE, TRUE, FALSE, TRUE, TRUE, TRUE
389 };
390
391 #define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4])
392 #define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)])
393
394
395 void DemodReset()
396 {
397 Demod.state = DEMOD_UNSYNCD;
398 Demod.len = 0; // number of decoded data bytes
399 Demod.shiftReg = 0; // shiftreg to hold decoded data bits
400 Demod.parityBits = 0; //
401 Demod.collisionPos = 0; // Position of collision bit
402 Demod.twoBits = 0xffff; // buffer for 2 Bits
403 Demod.highCnt = 0;
404 Demod.startTime = 0;
405 Demod.endTime = 0;
406 }
407
408 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
409 static RAMFUNC int ManchesterDecoding(uint8_t bit, uint16_t offset, uint32_t non_real_time)
410 {
411
412 Demod.twoBits = (Demod.twoBits << 8) | bit;
413
414 if (Demod.state == DEMOD_UNSYNCD) {
415
416 if (Demod.highCnt < 2) { // wait for a stable unmodulated signal
417 if (Demod.twoBits == 0x0000) {
418 Demod.highCnt++;
419 } else {
420 Demod.highCnt = 0;
421 }
422 } else {
423 Demod.syncBit = 0xFFFF; // not set
424 if ((Demod.twoBits & 0x7700) == 0x7000) Demod.syncBit = 7;
425 else if ((Demod.twoBits & 0x3B80) == 0x3800) Demod.syncBit = 6;
426 else if ((Demod.twoBits & 0x1DC0) == 0x1C00) Demod.syncBit = 5;
427 else if ((Demod.twoBits & 0x0EE0) == 0x0E00) Demod.syncBit = 4;
428 else if ((Demod.twoBits & 0x0770) == 0x0700) Demod.syncBit = 3;
429 else if ((Demod.twoBits & 0x03B8) == 0x0380) Demod.syncBit = 2;
430 else if ((Demod.twoBits & 0x01DC) == 0x01C0) Demod.syncBit = 1;
431 else if ((Demod.twoBits & 0x00EE) == 0x00E0) Demod.syncBit = 0;
432 if (Demod.syncBit != 0xFFFF) {
433 Demod.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
434 Demod.startTime -= Demod.syncBit;
435 Demod.bitCount = offset; // number of decoded data bits
436 Demod.state = DEMOD_MANCHESTER_DATA;
437 }
438 }
439
440 } else {
441
442 if (IsManchesterModulationNibble1(Demod.twoBits >> Demod.syncBit)) { // modulation in first half
443 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // ... and in second half = collision
444 if (!Demod.collisionPos) {
445 Demod.collisionPos = (Demod.len << 3) + Demod.bitCount;
446 }
447 } // modulation in first half only - Sequence D = 1
448 Demod.bitCount++;
449 Demod.shiftReg = (Demod.shiftReg >> 1) | 0x100; // in both cases, add a 1 to the shiftreg
450 if(Demod.bitCount == 9) { // if we decoded a full byte (including parity)
451 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
452 Demod.parityBits <<= 1; // make room for the parity bit
453 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
454 Demod.bitCount = 0;
455 Demod.shiftReg = 0;
456 }
457 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1) - 4;
458 } else { // no modulation in first half
459 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // and modulation in second half = Sequence E = 0
460 Demod.bitCount++;
461 Demod.shiftReg = (Demod.shiftReg >> 1); // add a 0 to the shiftreg
462 if(Demod.bitCount >= 9) { // if we decoded a full byte (including parity)
463 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
464 Demod.parityBits <<= 1; // make room for the new parity bit
465 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
466 Demod.bitCount = 0;
467 Demod.shiftReg = 0;
468 }
469 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1);
470 } else { // no modulation in both halves - End of communication
471 if (Demod.len > 0 || Demod.bitCount > 0) { // received something
472 if(Demod.bitCount > 0) { // if we decoded bits
473 Demod.shiftReg >>= (9 - Demod.bitCount); // add the remaining decoded bits to the output
474 Demod.output[Demod.len++] = Demod.shiftReg & 0xff;
475 // No parity bit, so just shift a 0
476 Demod.parityBits <<= 1;
477 }
478 return TRUE; // we are finished with decoding the raw data sequence
479 } else { // nothing received. Start over
480 DemodReset();
481 }
482 }
483 }
484
485 }
486
487 return FALSE; // not finished yet, need more data
488 }
489
490 //=============================================================================
491 // Finally, a `sniffer' for ISO 14443 Type A
492 // Both sides of communication!
493 //=============================================================================
494
495 //-----------------------------------------------------------------------------
496 // Record the sequence of commands sent by the reader to the tag, with
497 // triggering so that we start recording at the point that the tag is moved
498 // near the reader.
499 //-----------------------------------------------------------------------------
500 void RAMFUNC SnoopIso14443a(uint8_t param) {
501 // param:
502 // bit 0 - trigger from first card answer
503 // bit 1 - trigger from first reader 7-bit request
504
505 LEDsoff();
506 // init trace buffer
507 iso14a_clear_trace();
508
509 // We won't start recording the frames that we acquire until we trigger;
510 // a good trigger condition to get started is probably when we see a
511 // response from the tag.
512 // triggered == FALSE -- to wait first for card
513 bool triggered = !(param & 0x03);
514
515 // The command (reader -> tag) that we're receiving.
516 // The length of a received command will in most cases be no more than 18 bytes.
517 // So 32 should be enough!
518 uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET);
519 // The response (tag -> reader) that we're receiving.
520 uint8_t *receivedResponse = (((uint8_t *)BigBuf) + RECV_RES_OFFSET);
521
522 // As we receive stuff, we copy it from receivedCmd or receivedResponse
523 // into trace, along with its length and other annotations.
524 //uint8_t *trace = (uint8_t *)BigBuf;
525
526 // The DMA buffer, used to stream samples from the FPGA
527 uint8_t *dmaBuf = ((uint8_t *)BigBuf) + DMA_BUFFER_OFFSET;
528 uint8_t *data = dmaBuf;
529 uint8_t previous_data = 0;
530 int maxDataLen = 0;
531 int dataLen = 0;
532 bool TagIsActive = FALSE;
533 bool ReaderIsActive = FALSE;
534
535 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
536
537 // Set up the demodulator for tag -> reader responses.
538 Demod.output = receivedResponse;
539
540 // Set up the demodulator for the reader -> tag commands
541 Uart.output = receivedCmd;
542
543 // Setup and start DMA.
544 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
545
546 // And now we loop, receiving samples.
547 for(uint32_t rsamples = 0; TRUE; ) {
548
549 if(BUTTON_PRESS()) {
550 DbpString("cancelled by button");
551 break;
552 }
553
554 LED_A_ON();
555 WDT_HIT();
556
557 int register readBufDataP = data - dmaBuf;
558 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR;
559 if (readBufDataP <= dmaBufDataP){
560 dataLen = dmaBufDataP - readBufDataP;
561 } else {
562 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP;
563 }
564 // test for length of buffer
565 if(dataLen > maxDataLen) {
566 maxDataLen = dataLen;
567 if(dataLen > 400) {
568 Dbprintf("blew circular buffer! dataLen=%d", dataLen);
569 break;
570 }
571 }
572 if(dataLen < 1) continue;
573
574 // primary buffer was stopped( <-- we lost data!
575 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
576 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
577 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
578 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
579 }
580 // secondary buffer sets as primary, secondary buffer was stopped
581 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
582 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
583 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
584 }
585
586 LED_A_OFF();
587
588 if (rsamples & 0x01) { // Need two samples to feed Miller and Manchester-Decoder
589
590 if(!TagIsActive) { // no need to try decoding reader data if the tag is sending
591 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
592 if (MillerDecoding(readerdata, (rsamples-1)*4)) {
593 LED_C_ON();
594
595 // check - if there is a short 7bit request from reader
596 if ((!triggered) && (param & 0x02) && (Uart.len == 1) && (Uart.bitCount == 7)) triggered = TRUE;
597
598 if(triggered) {
599 if (!LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, Uart.parityBits, TRUE)) break;
600 if (!LogTrace(NULL, 0, Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, 0, TRUE)) break;
601 }
602 /* And ready to receive another command. */
603 UartReset();
604 /* And also reset the demod code, which might have been */
605 /* false-triggered by the commands from the reader. */
606 DemodReset();
607 LED_B_OFF();
608 }
609 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
610 }
611
612 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
613 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
614 if(ManchesterDecoding(tagdata, 0, (rsamples-1)*4)) {
615 LED_B_ON();
616
617 if (!LogTrace(receivedResponse, Demod.len, Demod.startTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER, Demod.parityBits, FALSE)) break;
618 if (!LogTrace(NULL, 0, Demod.endTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER, 0, FALSE)) break;
619
620 if ((!triggered) && (param & 0x01)) triggered = TRUE;
621
622 // And ready to receive another response.
623 DemodReset();
624 LED_C_OFF();
625 }
626 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
627 }
628 }
629
630 previous_data = *data;
631 rsamples++;
632 data++;
633 if(data == dmaBuf + DMA_BUFFER_SIZE) {
634 data = dmaBuf;
635 }
636 } // main cycle
637
638 DbpString("COMMAND FINISHED");
639
640 FpgaDisableSscDma();
641 Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen, Uart.state, Uart.len);
642 Dbprintf("traceLen=%d, Uart.output[0]=%08x", traceLen, (uint32_t)Uart.output[0]);
643 LEDsoff();
644 }
645
646 //-----------------------------------------------------------------------------
647 // Prepare tag messages
648 //-----------------------------------------------------------------------------
649 static void CodeIso14443aAsTagPar(const uint8_t *cmd, int len, uint32_t dwParity)
650 {
651 int i;
652
653 ToSendReset();
654
655 // Correction bit, might be removed when not needed
656 ToSendStuffBit(0);
657 ToSendStuffBit(0);
658 ToSendStuffBit(0);
659 ToSendStuffBit(0);
660 ToSendStuffBit(1); // 1
661 ToSendStuffBit(0);
662 ToSendStuffBit(0);
663 ToSendStuffBit(0);
664
665 // Send startbit
666 ToSend[++ToSendMax] = SEC_D;
667 LastProxToAirDuration = 8 * ToSendMax - 4;
668
669 for(i = 0; i < len; i++) {
670 int j;
671 uint8_t b = cmd[i];
672
673 // Data bits
674 for(j = 0; j < 8; j++) {
675 if(b & 1) {
676 ToSend[++ToSendMax] = SEC_D;
677 } else {
678 ToSend[++ToSendMax] = SEC_E;
679 }
680 b >>= 1;
681 }
682
683 // Get the parity bit
684 if ((dwParity >> i) & 0x01) {
685 ToSend[++ToSendMax] = SEC_D;
686 LastProxToAirDuration = 8 * ToSendMax - 4;
687 } else {
688 ToSend[++ToSendMax] = SEC_E;
689 LastProxToAirDuration = 8 * ToSendMax;
690 }
691 }
692
693 // Send stopbit
694 ToSend[++ToSendMax] = SEC_F;
695
696 // Convert from last byte pos to length
697 ToSendMax++;
698 }
699
700 static void CodeIso14443aAsTag(const uint8_t *cmd, int len){
701 CodeIso14443aAsTagPar(cmd, len, GetParity(cmd, len));
702 }
703
704
705 static void Code4bitAnswerAsTag(uint8_t cmd)
706 {
707 int i;
708
709 ToSendReset();
710
711 // Correction bit, might be removed when not needed
712 ToSendStuffBit(0);
713 ToSendStuffBit(0);
714 ToSendStuffBit(0);
715 ToSendStuffBit(0);
716 ToSendStuffBit(1); // 1
717 ToSendStuffBit(0);
718 ToSendStuffBit(0);
719 ToSendStuffBit(0);
720
721 // Send startbit
722 ToSend[++ToSendMax] = SEC_D;
723
724 uint8_t b = cmd;
725 for(i = 0; i < 4; i++) {
726 if(b & 1) {
727 ToSend[++ToSendMax] = SEC_D;
728 LastProxToAirDuration = 8 * ToSendMax - 4;
729 } else {
730 ToSend[++ToSendMax] = SEC_E;
731 LastProxToAirDuration = 8 * ToSendMax;
732 }
733 b >>= 1;
734 }
735
736 // Send stopbit
737 ToSend[++ToSendMax] = SEC_F;
738
739 // Convert from last byte pos to length
740 ToSendMax++;
741 }
742
743 //-----------------------------------------------------------------------------
744 // Wait for commands from reader
745 // Stop when button is pressed
746 // Or return TRUE when command is captured
747 //-----------------------------------------------------------------------------
748 static int GetIso14443aCommandFromReader(uint8_t *received, int *len, int maxLen)
749 {
750 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
751 // only, since we are receiving, not transmitting).
752 // Signal field is off with the appropriate LED
753 LED_D_OFF();
754 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
755
756 // Now run a `software UART' on the stream of incoming samples.
757 UartReset();
758 Uart.output = received;
759
760 // clear RXRDY:
761 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
762
763 for(;;) {
764 WDT_HIT();
765
766 if(BUTTON_PRESS()) return FALSE;
767
768 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
769 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
770 if(MillerDecoding(b, 0)) {
771 *len = Uart.len;
772 return TRUE;
773 }
774 }
775 }
776 }
777
778 static int EmSendCmd14443aRaw(uint8_t *resp, int respLen, bool correctionNeeded);
779 int EmSend4bitEx(uint8_t resp, bool correctionNeeded);
780 int EmSend4bit(uint8_t resp);
781 int EmSendCmdExPar(uint8_t *resp, int respLen, bool correctionNeeded, uint32_t par);
782 int EmSendCmdExPar(uint8_t *resp, int respLen, bool correctionNeeded, uint32_t par);
783 int EmSendCmdEx(uint8_t *resp, int respLen, bool correctionNeeded);
784 int EmSendCmd(uint8_t *resp, int respLen);
785 int EmSendCmdPar(uint8_t *resp, int respLen, uint32_t par);
786 bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint32_t reader_Parity,
787 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint32_t tag_Parity);
788
789 static uint8_t* free_buffer_pointer = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET);
790
791 typedef struct {
792 uint8_t* response;
793 size_t response_n;
794 uint8_t* modulation;
795 size_t modulation_n;
796 uint32_t ProxToAirDuration;
797 } tag_response_info_t;
798
799 void reset_free_buffer() {
800 free_buffer_pointer = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET);
801 }
802
803 bool prepare_tag_modulation(tag_response_info_t* response_info, size_t max_buffer_size) {
804 // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes
805 // This will need the following byte array for a modulation sequence
806 // 144 data bits (18 * 8)
807 // 18 parity bits
808 // 2 Start and stop
809 // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA)
810 // 1 just for the case
811 // ----------- +
812 // 166 bytes, since every bit that needs to be send costs us a byte
813 //
814
815 // Prepare the tag modulation bits from the message
816 CodeIso14443aAsTag(response_info->response,response_info->response_n);
817
818 // Make sure we do not exceed the free buffer space
819 if (ToSendMax > max_buffer_size) {
820 Dbprintf("Out of memory, when modulating bits for tag answer:");
821 Dbhexdump(response_info->response_n,response_info->response,false);
822 return false;
823 }
824
825 // Copy the byte array, used for this modulation to the buffer position
826 memcpy(response_info->modulation,ToSend,ToSendMax);
827
828 // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them
829 response_info->modulation_n = ToSendMax;
830 response_info->ProxToAirDuration = LastProxToAirDuration;
831
832 return true;
833 }
834
835 bool prepare_allocated_tag_modulation(tag_response_info_t* response_info) {
836 // Retrieve and store the current buffer index
837 response_info->modulation = free_buffer_pointer;
838
839 // Determine the maximum size we can use from our buffer
840 size_t max_buffer_size = (((uint8_t *)BigBuf)+FREE_BUFFER_OFFSET+FREE_BUFFER_SIZE)-free_buffer_pointer;
841
842 // Forward the prepare tag modulation function to the inner function
843 if (prepare_tag_modulation(response_info,max_buffer_size)) {
844 // Update the free buffer offset
845 free_buffer_pointer += ToSendMax;
846 return true;
847 } else {
848 return false;
849 }
850 }
851
852 //-----------------------------------------------------------------------------
853 // Main loop of simulated tag: receive commands from reader, decide what
854 // response to send, and send it.
855 //-----------------------------------------------------------------------------
856 void SimulateIso14443aTag(int tagType, int uid_1st, int uid_2nd, byte_t* data)
857 {
858 // Enable and clear the trace
859 iso14a_clear_trace();
860 iso14a_set_tracing(TRUE);
861
862 uint8_t sak;
863
864 // The first response contains the ATQA (note: bytes are transmitted in reverse order).
865 uint8_t response1[2];
866
867 switch (tagType) {
868 case 1: { // MIFARE Classic
869 // Says: I am Mifare 1k - original line
870 response1[0] = 0x04;
871 response1[1] = 0x00;
872 sak = 0x08;
873 } break;
874 case 2: { // MIFARE Ultralight
875 // Says: I am a stupid memory tag, no crypto
876 response1[0] = 0x04;
877 response1[1] = 0x00;
878 sak = 0x00;
879 } break;
880 case 3: { // MIFARE DESFire
881 // Says: I am a DESFire tag, ph33r me
882 response1[0] = 0x04;
883 response1[1] = 0x03;
884 sak = 0x20;
885 } break;
886 case 4: { // ISO/IEC 14443-4
887 // Says: I am a javacard (JCOP)
888 response1[0] = 0x04;
889 response1[1] = 0x00;
890 sak = 0x28;
891 } break;
892 default: {
893 Dbprintf("Error: unkown tagtype (%d)",tagType);
894 return;
895 } break;
896 }
897
898 // The second response contains the (mandatory) first 24 bits of the UID
899 uint8_t response2[5];
900
901 // Check if the uid uses the (optional) part
902 uint8_t response2a[5];
903 if (uid_2nd) {
904 response2[0] = 0x88;
905 num_to_bytes(uid_1st,3,response2+1);
906 num_to_bytes(uid_2nd,4,response2a);
907 response2a[4] = response2a[0] ^ response2a[1] ^ response2a[2] ^ response2a[3];
908
909 // Configure the ATQA and SAK accordingly
910 response1[0] |= 0x40;
911 sak |= 0x04;
912 } else {
913 num_to_bytes(uid_1st,4,response2);
914 // Configure the ATQA and SAK accordingly
915 response1[0] &= 0xBF;
916 sak &= 0xFB;
917 }
918
919 // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID.
920 response2[4] = response2[0] ^ response2[1] ^ response2[2] ^ response2[3];
921
922 // Prepare the mandatory SAK (for 4 and 7 byte UID)
923 uint8_t response3[3];
924 response3[0] = sak;
925 ComputeCrc14443(CRC_14443_A, response3, 1, &response3[1], &response3[2]);
926
927 // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit
928 uint8_t response3a[3];
929 response3a[0] = sak & 0xFB;
930 ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]);
931
932 uint8_t response5[] = { 0x00, 0x00, 0x00, 0x00 }; // Very random tag nonce
933 uint8_t response6[] = { 0x04, 0x58, 0x00, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS
934 ComputeCrc14443(CRC_14443_A, response6, 4, &response6[4], &response6[5]);
935
936 #define TAG_RESPONSE_COUNT 7
937 tag_response_info_t responses[TAG_RESPONSE_COUNT] = {
938 { .response = response1, .response_n = sizeof(response1) }, // Answer to request - respond with card type
939 { .response = response2, .response_n = sizeof(response2) }, // Anticollision cascade1 - respond with uid
940 { .response = response2a, .response_n = sizeof(response2a) }, // Anticollision cascade2 - respond with 2nd half of uid if asked
941 { .response = response3, .response_n = sizeof(response3) }, // Acknowledge select - cascade 1
942 { .response = response3a, .response_n = sizeof(response3a) }, // Acknowledge select - cascade 2
943 { .response = response5, .response_n = sizeof(response5) }, // Authentication answer (random nonce)
944 { .response = response6, .response_n = sizeof(response6) }, // dummy ATS (pseudo-ATR), answer to RATS
945 };
946
947 // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it
948 // Such a response is less time critical, so we can prepare them on the fly
949 #define DYNAMIC_RESPONSE_BUFFER_SIZE 64
950 #define DYNAMIC_MODULATION_BUFFER_SIZE 512
951 uint8_t dynamic_response_buffer[DYNAMIC_RESPONSE_BUFFER_SIZE];
952 uint8_t dynamic_modulation_buffer[DYNAMIC_MODULATION_BUFFER_SIZE];
953 tag_response_info_t dynamic_response_info = {
954 .response = dynamic_response_buffer,
955 .response_n = 0,
956 .modulation = dynamic_modulation_buffer,
957 .modulation_n = 0
958 };
959
960 // Reset the offset pointer of the free buffer
961 reset_free_buffer();
962
963 // Prepare the responses of the anticollision phase
964 // there will be not enough time to do this at the moment the reader sends it REQA
965 for (size_t i=0; i<TAG_RESPONSE_COUNT; i++) {
966 prepare_allocated_tag_modulation(&responses[i]);
967 }
968
969 uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET);
970 int len = 0;
971
972 // To control where we are in the protocol
973 int order = 0;
974 int lastorder;
975
976 // Just to allow some checks
977 int happened = 0;
978 int happened2 = 0;
979 int cmdsRecvd = 0;
980
981 // We need to listen to the high-frequency, peak-detected path.
982 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
983
984 cmdsRecvd = 0;
985 tag_response_info_t* p_response;
986
987 LED_A_ON();
988 for(;;) {
989 // Clean receive command buffer
990
991 if(!GetIso14443aCommandFromReader(receivedCmd, &len, RECV_CMD_SIZE)) {
992 DbpString("Button press");
993 break;
994 }
995
996 p_response = NULL;
997
998 // doob - added loads of debug strings so we can see what the reader is saying to us during the sim as hi14alist is not populated
999 // Okay, look at the command now.
1000 lastorder = order;
1001 if(receivedCmd[0] == 0x26) { // Received a REQUEST
1002 p_response = &responses[0]; order = 1;
1003 } else if(receivedCmd[0] == 0x52) { // Received a WAKEUP
1004 p_response = &responses[0]; order = 6;
1005 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x93) { // Received request for UID (cascade 1)
1006 p_response = &responses[1]; order = 2;
1007 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x95) { // Received request for UID (cascade 2)
1008 p_response = &responses[2]; order = 20;
1009 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x93) { // Received a SELECT (cascade 1)
1010 p_response = &responses[3]; order = 3;
1011 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x95) { // Received a SELECT (cascade 2)
1012 p_response = &responses[4]; order = 30;
1013 } else if(receivedCmd[0] == 0x30) { // Received a (plain) READ
1014 EmSendCmdEx(data+(4*receivedCmd[0]),16,false);
1015 // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]);
1016 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
1017 p_response = NULL;
1018 } else if(receivedCmd[0] == 0x50) { // Received a HALT
1019 // DbpString("Reader requested we HALT!:");
1020 if (tracing) {
1021 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
1022 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
1023 }
1024 p_response = NULL;
1025 } else if(receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61) { // Received an authentication request
1026 p_response = &responses[5]; order = 7;
1027 } else if(receivedCmd[0] == 0xE0) { // Received a RATS request
1028 if (tagType == 1 || tagType == 2) { // RATS not supported
1029 EmSend4bit(CARD_NACK_NA);
1030 p_response = NULL;
1031 } else {
1032 p_response = &responses[6]; order = 70;
1033 }
1034 } else if (order == 7 && len == 8) { // Received authentication request
1035 if (tracing) {
1036 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
1037 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
1038 }
1039 uint32_t nr = bytes_to_num(receivedCmd,4);
1040 uint32_t ar = bytes_to_num(receivedCmd+4,4);
1041 Dbprintf("Auth attempt {nr}{ar}: %08x %08x",nr,ar);
1042 } else {
1043 // Check for ISO 14443A-4 compliant commands, look at left nibble
1044 switch (receivedCmd[0]) {
1045
1046 case 0x0B:
1047 case 0x0A: { // IBlock (command)
1048 dynamic_response_info.response[0] = receivedCmd[0];
1049 dynamic_response_info.response[1] = 0x00;
1050 dynamic_response_info.response[2] = 0x90;
1051 dynamic_response_info.response[3] = 0x00;
1052 dynamic_response_info.response_n = 4;
1053 } break;
1054
1055 case 0x1A:
1056 case 0x1B: { // Chaining command
1057 dynamic_response_info.response[0] = 0xaa | ((receivedCmd[0]) & 1);
1058 dynamic_response_info.response_n = 2;
1059 } break;
1060
1061 case 0xaa:
1062 case 0xbb: {
1063 dynamic_response_info.response[0] = receivedCmd[0] ^ 0x11;
1064 dynamic_response_info.response_n = 2;
1065 } break;
1066
1067 case 0xBA: { //
1068 memcpy(dynamic_response_info.response,"\xAB\x00",2);
1069 dynamic_response_info.response_n = 2;
1070 } break;
1071
1072 case 0xCA:
1073 case 0xC2: { // Readers sends deselect command
1074 memcpy(dynamic_response_info.response,"\xCA\x00",2);
1075 dynamic_response_info.response_n = 2;
1076 } break;
1077
1078 default: {
1079 // Never seen this command before
1080 if (tracing) {
1081 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
1082 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
1083 }
1084 Dbprintf("Received unknown command (len=%d):",len);
1085 Dbhexdump(len,receivedCmd,false);
1086 // Do not respond
1087 dynamic_response_info.response_n = 0;
1088 } break;
1089 }
1090
1091 if (dynamic_response_info.response_n > 0) {
1092 // Copy the CID from the reader query
1093 dynamic_response_info.response[1] = receivedCmd[1];
1094
1095 // Add CRC bytes, always used in ISO 14443A-4 compliant cards
1096 AppendCrc14443a(dynamic_response_info.response,dynamic_response_info.response_n);
1097 dynamic_response_info.response_n += 2;
1098
1099 if (prepare_tag_modulation(&dynamic_response_info,DYNAMIC_MODULATION_BUFFER_SIZE) == false) {
1100 Dbprintf("Error preparing tag response");
1101 if (tracing) {
1102 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
1103 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
1104 }
1105 break;
1106 }
1107 p_response = &dynamic_response_info;
1108 }
1109 }
1110
1111 // Count number of wakeups received after a halt
1112 if(order == 6 && lastorder == 5) { happened++; }
1113
1114 // Count number of other messages after a halt
1115 if(order != 6 && lastorder == 5) { happened2++; }
1116
1117 if(cmdsRecvd > 999) {
1118 DbpString("1000 commands later...");
1119 break;
1120 }
1121 cmdsRecvd++;
1122
1123 if (p_response != NULL) {
1124 EmSendCmd14443aRaw(p_response->modulation, p_response->modulation_n, receivedCmd[0] == 0x52);
1125 // do the tracing for the previous reader request and this tag answer:
1126 EmLogTrace(Uart.output,
1127 Uart.len,
1128 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1129 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1130 Uart.parityBits,
1131 p_response->response,
1132 p_response->response_n,
1133 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1134 (LastTimeProxToAirStart + p_response->ProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1135 SwapBits(GetParity(p_response->response, p_response->response_n), p_response->response_n));
1136 }
1137
1138 if (!tracing) {
1139 Dbprintf("Trace Full. Simulation stopped.");
1140 break;
1141 }
1142 }
1143
1144 Dbprintf("%x %x %x", happened, happened2, cmdsRecvd);
1145 LED_A_OFF();
1146 }
1147
1148
1149 // prepare a delayed transfer. This simply shifts ToSend[] by a number
1150 // of bits specified in the delay parameter.
1151 void PrepareDelayedTransfer(uint16_t delay)
1152 {
1153 uint8_t bitmask = 0;
1154 uint8_t bits_to_shift = 0;
1155 uint8_t bits_shifted = 0;
1156
1157 delay &= 0x07;
1158 if (delay) {
1159 for (uint16_t i = 0; i < delay; i++) {
1160 bitmask |= (0x01 << i);
1161 }
1162 ToSend[ToSendMax++] = 0x00;
1163 for (uint16_t i = 0; i < ToSendMax; i++) {
1164 bits_to_shift = ToSend[i] & bitmask;
1165 ToSend[i] = ToSend[i] >> delay;
1166 ToSend[i] = ToSend[i] | (bits_shifted << (8 - delay));
1167 bits_shifted = bits_to_shift;
1168 }
1169 }
1170 }
1171
1172
1173 //-------------------------------------------------------------------------------------
1174 // Transmit the command (to the tag) that was placed in ToSend[].
1175 // Parameter timing:
1176 // if NULL: transfer at next possible time, taking into account
1177 // request guard time and frame delay time
1178 // if == 0: transfer immediately and return time of transfer
1179 // if != 0: delay transfer until time specified
1180 //-------------------------------------------------------------------------------------
1181 static void TransmitFor14443a(const uint8_t *cmd, int len, uint32_t *timing)
1182 {
1183
1184 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1185
1186 uint32_t ThisTransferTime = 0;
1187
1188 if (timing) {
1189 if(*timing == 0) { // Measure time
1190 *timing = (GetCountSspClk() + 8) & 0xfffffff8;
1191 } else {
1192 PrepareDelayedTransfer(*timing & 0x00000007); // Delay transfer (fine tuning - up to 7 MF clock ticks)
1193 }
1194 if(MF_DBGLEVEL >= 4 && GetCountSspClk() >= (*timing & 0xfffffff8)) Dbprintf("TransmitFor14443a: Missed timing");
1195 while(GetCountSspClk() < (*timing & 0xfffffff8)); // Delay transfer (multiple of 8 MF clock ticks)
1196 LastTimeProxToAirStart = *timing;
1197 } else {
1198 ThisTransferTime = ((MAX(NextTransferTime, GetCountSspClk()) & 0xfffffff8) + 8);
1199 while(GetCountSspClk() < ThisTransferTime);
1200 LastTimeProxToAirStart = ThisTransferTime;
1201 }
1202
1203 // clear TXRDY
1204 AT91C_BASE_SSC->SSC_THR = SEC_Y;
1205
1206 // for(uint16_t c = 0; c < 10;) { // standard delay for each transfer (allow tag to be ready after last transmission)
1207 // if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1208 // AT91C_BASE_SSC->SSC_THR = SEC_Y;
1209 // c++;
1210 // }
1211 // }
1212
1213 uint16_t c = 0;
1214 for(;;) {
1215 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1216 AT91C_BASE_SSC->SSC_THR = cmd[c];
1217 c++;
1218 if(c >= len) {
1219 break;
1220 }
1221 }
1222 }
1223
1224 NextTransferTime = MAX(NextTransferTime, LastTimeProxToAirStart + REQUEST_GUARD_TIME);
1225
1226 }
1227
1228
1229 //-----------------------------------------------------------------------------
1230 // Prepare reader command (in bits, support short frames) to send to FPGA
1231 //-----------------------------------------------------------------------------
1232 void CodeIso14443aBitsAsReaderPar(const uint8_t * cmd, int bits, uint32_t dwParity)
1233 {
1234 int i, j;
1235 int last;
1236 uint8_t b;
1237
1238 ToSendReset();
1239
1240 // Start of Communication (Seq. Z)
1241 ToSend[++ToSendMax] = SEC_Z;
1242 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1243 last = 0;
1244
1245 size_t bytecount = nbytes(bits);
1246 // Generate send structure for the data bits
1247 for (i = 0; i < bytecount; i++) {
1248 // Get the current byte to send
1249 b = cmd[i];
1250 size_t bitsleft = MIN((bits-(i*8)),8);
1251
1252 for (j = 0; j < bitsleft; j++) {
1253 if (b & 1) {
1254 // Sequence X
1255 ToSend[++ToSendMax] = SEC_X;
1256 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1257 last = 1;
1258 } else {
1259 if (last == 0) {
1260 // Sequence Z
1261 ToSend[++ToSendMax] = SEC_Z;
1262 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1263 } else {
1264 // Sequence Y
1265 ToSend[++ToSendMax] = SEC_Y;
1266 last = 0;
1267 }
1268 }
1269 b >>= 1;
1270 }
1271
1272 // Only transmit (last) parity bit if we transmitted a complete byte
1273 if (j == 8) {
1274 // Get the parity bit
1275 if ((dwParity >> i) & 0x01) {
1276 // Sequence X
1277 ToSend[++ToSendMax] = SEC_X;
1278 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1279 last = 1;
1280 } else {
1281 if (last == 0) {
1282 // Sequence Z
1283 ToSend[++ToSendMax] = SEC_Z;
1284 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1285 } else {
1286 // Sequence Y
1287 ToSend[++ToSendMax] = SEC_Y;
1288 last = 0;
1289 }
1290 }
1291 }
1292 }
1293
1294 // End of Communication: Logic 0 followed by Sequence Y
1295 if (last == 0) {
1296 // Sequence Z
1297 ToSend[++ToSendMax] = SEC_Z;
1298 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1299 } else {
1300 // Sequence Y
1301 ToSend[++ToSendMax] = SEC_Y;
1302 last = 0;
1303 }
1304 ToSend[++ToSendMax] = SEC_Y;
1305
1306 // Convert to length of command:
1307 ToSendMax++;
1308 }
1309
1310 //-----------------------------------------------------------------------------
1311 // Prepare reader command to send to FPGA
1312 //-----------------------------------------------------------------------------
1313 void CodeIso14443aAsReaderPar(const uint8_t * cmd, int len, uint32_t dwParity)
1314 {
1315 CodeIso14443aBitsAsReaderPar(cmd,len*8,dwParity);
1316 }
1317
1318 //-----------------------------------------------------------------------------
1319 // Wait for commands from reader
1320 // Stop when button is pressed (return 1) or field was gone (return 2)
1321 // Or return 0 when command is captured
1322 //-----------------------------------------------------------------------------
1323 static int EmGetCmd(uint8_t *received, int *len)
1324 {
1325 *len = 0;
1326
1327 uint32_t timer = 0, vtime = 0;
1328 int analogCnt = 0;
1329 int analogAVG = 0;
1330
1331 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1332 // only, since we are receiving, not transmitting).
1333 // Signal field is off with the appropriate LED
1334 LED_D_OFF();
1335 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1336
1337 // Set ADC to read field strength
1338 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;
1339 AT91C_BASE_ADC->ADC_MR =
1340 ADC_MODE_PRESCALE(32) |
1341 ADC_MODE_STARTUP_TIME(16) |
1342 ADC_MODE_SAMPLE_HOLD_TIME(8);
1343 AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ADC_CHAN_HF);
1344 // start ADC
1345 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1346
1347 // Now run a 'software UART' on the stream of incoming samples.
1348 UartReset();
1349 Uart.output = received;
1350
1351 // Clear RXRDY:
1352 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1353
1354 for(;;) {
1355 WDT_HIT();
1356
1357 if (BUTTON_PRESS()) return 1;
1358
1359 // test if the field exists
1360 if (AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ADC_CHAN_HF)) {
1361 analogCnt++;
1362 analogAVG += AT91C_BASE_ADC->ADC_CDR[ADC_CHAN_HF];
1363 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1364 if (analogCnt >= 32) {
1365 if ((33000 * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) {
1366 vtime = GetTickCount();
1367 if (!timer) timer = vtime;
1368 // 50ms no field --> card to idle state
1369 if (vtime - timer > 50) return 2;
1370 } else
1371 if (timer) timer = 0;
1372 analogCnt = 0;
1373 analogAVG = 0;
1374 }
1375 }
1376
1377 // receive and test the miller decoding
1378 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1379 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1380 if(MillerDecoding(b, 0)) {
1381 *len = Uart.len;
1382 return 0;
1383 }
1384 }
1385
1386 }
1387 }
1388
1389
1390 static int EmSendCmd14443aRaw(uint8_t *resp, int respLen, bool correctionNeeded)
1391 {
1392 uint8_t b;
1393 uint16_t i = 0;
1394 uint32_t ThisTransferTime;
1395
1396 // Modulate Manchester
1397 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD);
1398
1399 // include correction bit if necessary
1400 if (Uart.parityBits & 0x01) {
1401 correctionNeeded = TRUE;
1402 }
1403 if(correctionNeeded) {
1404 // 1236, so correction bit needed
1405 i = 0;
1406 } else {
1407 i = 1;
1408 }
1409
1410 // clear receiving shift register and holding register
1411 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1412 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1413 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1414 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1415
1416 // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line)
1417 for (uint16_t j = 0; j < 5; j++) { // allow timeout - better late than never
1418 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1419 if (AT91C_BASE_SSC->SSC_RHR) break;
1420 }
1421
1422 while ((ThisTransferTime = GetCountSspClk()) & 0x00000007);
1423
1424 // Clear TXRDY:
1425 AT91C_BASE_SSC->SSC_THR = SEC_F;
1426
1427 // send cycle
1428 for(; i <= respLen; ) {
1429 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1430 AT91C_BASE_SSC->SSC_THR = resp[i++];
1431 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1432 }
1433
1434 if(BUTTON_PRESS()) {
1435 break;
1436 }
1437 }
1438
1439 // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again:
1440 for (i = 0; i < 2 ; ) {
1441 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1442 AT91C_BASE_SSC->SSC_THR = SEC_F;
1443 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1444 i++;
1445 }
1446 }
1447
1448 LastTimeProxToAirStart = ThisTransferTime + (correctionNeeded?8:0);
1449
1450 return 0;
1451 }
1452
1453 int EmSend4bitEx(uint8_t resp, bool correctionNeeded){
1454 Code4bitAnswerAsTag(resp);
1455 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1456 // do the tracing for the previous reader request and this tag answer:
1457 EmLogTrace(Uart.output,
1458 Uart.len,
1459 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1460 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1461 Uart.parityBits,
1462 &resp,
1463 1,
1464 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1465 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1466 SwapBits(GetParity(&resp, 1), 1));
1467 return res;
1468 }
1469
1470 int EmSend4bit(uint8_t resp){
1471 return EmSend4bitEx(resp, false);
1472 }
1473
1474 int EmSendCmdExPar(uint8_t *resp, int respLen, bool correctionNeeded, uint32_t par){
1475 CodeIso14443aAsTagPar(resp, respLen, par);
1476 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1477 // do the tracing for the previous reader request and this tag answer:
1478 EmLogTrace(Uart.output,
1479 Uart.len,
1480 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1481 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1482 Uart.parityBits,
1483 resp,
1484 respLen,
1485 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1486 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1487 SwapBits(GetParity(resp, respLen), respLen));
1488 return res;
1489 }
1490
1491 int EmSendCmdEx(uint8_t *resp, int respLen, bool correctionNeeded){
1492 return EmSendCmdExPar(resp, respLen, correctionNeeded, GetParity(resp, respLen));
1493 }
1494
1495 int EmSendCmd(uint8_t *resp, int respLen){
1496 return EmSendCmdExPar(resp, respLen, false, GetParity(resp, respLen));
1497 }
1498
1499 int EmSendCmdPar(uint8_t *resp, int respLen, uint32_t par){
1500 return EmSendCmdExPar(resp, respLen, false, par);
1501 }
1502
1503 bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint32_t reader_Parity,
1504 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint32_t tag_Parity)
1505 {
1506 if (tracing) {
1507 // we cannot exactly measure the end and start of a received command from reader. However we know that the delay from
1508 // end of the received command to start of the tag's (simulated by us) answer is n*128+20 or n*128+84 resp.
1509 // with n >= 9. The start of the tags answer can be measured and therefore the end of the received command be calculated:
1510 uint16_t reader_modlen = reader_EndTime - reader_StartTime;
1511 uint16_t approx_fdt = tag_StartTime - reader_EndTime;
1512 uint16_t exact_fdt = (approx_fdt - 20 + 32)/64 * 64 + 20;
1513 reader_EndTime = tag_StartTime - exact_fdt;
1514 reader_StartTime = reader_EndTime - reader_modlen;
1515 if (!LogTrace(reader_data, reader_len, reader_StartTime, reader_Parity, TRUE)) {
1516 return FALSE;
1517 } else if (!LogTrace(NULL, 0, reader_EndTime, 0, TRUE)) {
1518 return FALSE;
1519 } else if (!LogTrace(tag_data, tag_len, tag_StartTime, tag_Parity, FALSE)) {
1520 return FALSE;
1521 } else {
1522 return (!LogTrace(NULL, 0, tag_EndTime, 0, FALSE));
1523 }
1524 } else {
1525 return TRUE;
1526 }
1527 }
1528
1529 //-----------------------------------------------------------------------------
1530 // Wait a certain time for tag response
1531 // If a response is captured return TRUE
1532 // If it takes too long return FALSE
1533 //-----------------------------------------------------------------------------
1534 static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse, uint16_t offset, int maxLen)
1535 {
1536 uint16_t c;
1537
1538 // Set FPGA mode to "reader listen mode", no modulation (listen
1539 // only, since we are receiving, not transmitting).
1540 // Signal field is on with the appropriate LED
1541 LED_D_ON();
1542 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
1543
1544 // Now get the answer from the card
1545 DemodReset();
1546 Demod.output = receivedResponse;
1547
1548 // clear RXRDY:
1549 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1550
1551 c = 0;
1552 for(;;) {
1553 WDT_HIT();
1554
1555 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1556 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1557 if(ManchesterDecoding(b, offset, 0)) {
1558 NextTransferTime = MAX(NextTransferTime, Demod.endTime - (DELAY_AIR2ARM_AS_READER + DELAY_ARM2AIR_AS_READER)/16 + FRAME_DELAY_TIME_PICC_TO_PCD);
1559 return TRUE;
1560 } else if(c++ > iso14a_timeout) {
1561 return FALSE;
1562 }
1563 }
1564 }
1565 }
1566
1567 void ReaderTransmitBitsPar(uint8_t* frame, int bits, uint32_t par, uint32_t *timing)
1568 {
1569
1570 CodeIso14443aBitsAsReaderPar(frame,bits,par);
1571
1572 // Send command to tag
1573 TransmitFor14443a(ToSend, ToSendMax, timing);
1574 if(trigger)
1575 LED_A_ON();
1576
1577 // Log reader command in trace buffer
1578 if (tracing) {
1579 LogTrace(frame, nbytes(bits), LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_READER, par, TRUE);
1580 LogTrace(NULL, 0, (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_READER, 0, TRUE);
1581 }
1582 }
1583
1584 void ReaderTransmitPar(uint8_t* frame, int len, uint32_t par, uint32_t *timing)
1585 {
1586 ReaderTransmitBitsPar(frame,len*8,par, timing);
1587 }
1588
1589 void ReaderTransmitBits(uint8_t* frame, int len, uint32_t *timing)
1590 {
1591 // Generate parity and redirect
1592 ReaderTransmitBitsPar(frame,len,GetParity(frame,len/8), timing);
1593 }
1594
1595 void ReaderTransmit(uint8_t* frame, int len, uint32_t *timing)
1596 {
1597 // Generate parity and redirect
1598 ReaderTransmitBitsPar(frame,len*8,GetParity(frame,len), timing);
1599 }
1600
1601 int ReaderReceiveOffset(uint8_t* receivedAnswer, uint16_t offset)
1602 {
1603 if (!GetIso14443aAnswerFromTag(receivedAnswer,offset,160)) return FALSE;
1604 if (tracing) {
1605 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.parityBits, FALSE);
1606 LogTrace(NULL, 0, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, 0, FALSE);
1607 }
1608 return Demod.len;
1609 }
1610
1611 int ReaderReceive(uint8_t* receivedAnswer)
1612 {
1613 return ReaderReceiveOffset(receivedAnswer, 0);
1614 }
1615
1616 int ReaderReceivePar(uint8_t *receivedAnswer, uint32_t *parptr)
1617 {
1618 if (!GetIso14443aAnswerFromTag(receivedAnswer,0,160)) return FALSE;
1619 if (tracing) {
1620 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.parityBits, FALSE);
1621 LogTrace(NULL, 0, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, 0, FALSE);
1622 }
1623 *parptr = Demod.parityBits;
1624 return Demod.len;
1625 }
1626
1627 /* performs iso14443a anticollision procedure
1628 * fills the uid pointer unless NULL
1629 * fills resp_data unless NULL */
1630 int iso14443a_select_card(byte_t* uid_ptr, iso14a_card_select_t* p_hi14a_card, uint32_t* cuid_ptr) {
1631 uint8_t wupa[] = { 0x52 }; // 0x26 - REQA 0x52 - WAKE-UP
1632 uint8_t sel_all[] = { 0x93,0x20 };
1633 uint8_t sel_uid[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
1634 uint8_t rats[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
1635 uint8_t* resp = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET); // was 3560 - tied to other size changes
1636 byte_t uid_resp[4];
1637 size_t uid_resp_len;
1638
1639 uint8_t sak = 0x04; // cascade uid
1640 int cascade_level = 0;
1641 int len;
1642
1643 // Broadcast for a card, WUPA (0x52) will force response from all cards in the field
1644 ReaderTransmitBitsPar(wupa,7,0, NULL);
1645
1646 // Receive the ATQA
1647 if(!ReaderReceive(resp)) return 0;
1648 // Dbprintf("atqa: %02x %02x",resp[0],resp[1]);
1649
1650 if(p_hi14a_card) {
1651 memcpy(p_hi14a_card->atqa, resp, 2);
1652 p_hi14a_card->uidlen = 0;
1653 memset(p_hi14a_card->uid,0,10);
1654 }
1655
1656 // clear uid
1657 if (uid_ptr) {
1658 memset(uid_ptr,0,10);
1659 }
1660
1661 // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in
1662 // which case we need to make a cascade 2 request and select - this is a long UID
1663 // While the UID is not complete, the 3nd bit (from the right) is set in the SAK.
1664 for(; sak & 0x04; cascade_level++) {
1665 // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97)
1666 sel_uid[0] = sel_all[0] = 0x93 + cascade_level * 2;
1667
1668 // SELECT_ALL
1669 ReaderTransmit(sel_all,sizeof(sel_all), NULL);
1670 if (!ReaderReceive(resp)) return 0;
1671
1672 if (Demod.collisionPos) { // we had a collision and need to construct the UID bit by bit
1673 memset(uid_resp, 0, 4);
1674 uint16_t uid_resp_bits = 0;
1675 uint16_t collision_answer_offset = 0;
1676 // anti-collision-loop:
1677 while (Demod.collisionPos) {
1678 Dbprintf("Multiple tags detected. Collision after Bit %d", Demod.collisionPos);
1679 for (uint16_t i = collision_answer_offset; i < Demod.collisionPos; i++, uid_resp_bits++) { // add valid UID bits before collision point
1680 uint16_t UIDbit = (resp[i/8] >> (i % 8)) & 0x01;
1681 uid_resp[uid_resp_bits & 0xf8] |= UIDbit << (uid_resp_bits % 8);
1682 }
1683 uid_resp[uid_resp_bits/8] |= 1 << (uid_resp_bits % 8); // next time select the card(s) with a 1 in the collision position
1684 uid_resp_bits++;
1685 // construct anticollosion command:
1686 sel_uid[1] = ((2 + uid_resp_bits/8) << 4) | (uid_resp_bits & 0x07); // length of data in bytes and bits
1687 for (uint16_t i = 0; i <= uid_resp_bits/8; i++) {
1688 sel_uid[2+i] = uid_resp[i];
1689 }
1690 collision_answer_offset = uid_resp_bits%8;
1691 ReaderTransmitBits(sel_uid, 16 + uid_resp_bits, NULL);
1692 if (!ReaderReceiveOffset(resp, collision_answer_offset)) return 0;
1693 }
1694 // finally, add the last bits and BCC of the UID
1695 for (uint16_t i = collision_answer_offset; i < (Demod.len-1)*8; i++, uid_resp_bits++) {
1696 uint16_t UIDbit = (resp[i/8] >> (i%8)) & 0x01;
1697 uid_resp[uid_resp_bits/8] |= UIDbit << (uid_resp_bits % 8);
1698 }
1699
1700 } else { // no collision, use the response to SELECT_ALL as current uid
1701 memcpy(uid_resp,resp,4);
1702 }
1703 uid_resp_len = 4;
1704 // Dbprintf("uid: %02x %02x %02x %02x",uid_resp[0],uid_resp[1],uid_resp[2],uid_resp[3]);
1705
1706 // calculate crypto UID. Always use last 4 Bytes.
1707 if(cuid_ptr) {
1708 *cuid_ptr = bytes_to_num(uid_resp, 4);
1709 }
1710
1711 // Construct SELECT UID command
1712 sel_uid[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC)
1713 memcpy(sel_uid+2,uid_resp,4); // the UID
1714 sel_uid[6] = sel_uid[2] ^ sel_uid[3] ^ sel_uid[4] ^ sel_uid[5]; // calculate and add BCC
1715 AppendCrc14443a(sel_uid,7); // calculate and add CRC
1716 ReaderTransmit(sel_uid,sizeof(sel_uid), NULL);
1717
1718 // Receive the SAK
1719 if (!ReaderReceive(resp)) return 0;
1720 sak = resp[0];
1721
1722 // Test if more parts of the uid are comming
1723 if ((sak & 0x04) /* && uid_resp[0] == 0x88 */) {
1724 // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of:
1725 // http://www.nxp.com/documents/application_note/AN10927.pdf
1726 memcpy(uid_resp, uid_resp + 1, 3);
1727 uid_resp_len = 3;
1728 }
1729
1730 if(uid_ptr) {
1731 memcpy(uid_ptr + (cascade_level*3), uid_resp, uid_resp_len);
1732 }
1733
1734 if(p_hi14a_card) {
1735 memcpy(p_hi14a_card->uid + (cascade_level*3), uid_resp, uid_resp_len);
1736 p_hi14a_card->uidlen += uid_resp_len;
1737 }
1738 }
1739
1740 if(p_hi14a_card) {
1741 p_hi14a_card->sak = sak;
1742 p_hi14a_card->ats_len = 0;
1743 }
1744
1745 if( (sak & 0x20) == 0) {
1746 return 2; // non iso14443a compliant tag
1747 }
1748
1749 // Request for answer to select
1750 AppendCrc14443a(rats, 2);
1751 ReaderTransmit(rats, sizeof(rats), NULL);
1752
1753 if (!(len = ReaderReceive(resp))) return 0;
1754
1755 if(p_hi14a_card) {
1756 memcpy(p_hi14a_card->ats, resp, sizeof(p_hi14a_card->ats));
1757 p_hi14a_card->ats_len = len;
1758 }
1759
1760 // reset the PCB block number
1761 iso14_pcb_blocknum = 0;
1762 return 1;
1763 }
1764
1765 void iso14443a_setup(uint8_t fpga_minor_mode) {
1766 // Set up the synchronous serial port
1767 FpgaSetupSsc();
1768 // connect Demodulated Signal to ADC:
1769 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1770
1771 // Signal field is on with the appropriate LED
1772 if (fpga_minor_mode == FPGA_HF_ISO14443A_READER_MOD
1773 || fpga_minor_mode == FPGA_HF_ISO14443A_READER_LISTEN) {
1774 LED_D_ON();
1775 } else {
1776 LED_D_OFF();
1777 }
1778 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | fpga_minor_mode);
1779
1780 // Start the timer
1781 StartCountSspClk();
1782
1783 DemodReset();
1784 UartReset();
1785 NextTransferTime = 2*DELAY_ARM2AIR_AS_READER;
1786 iso14a_set_timeout(1050); // 10ms default
1787 }
1788
1789 int iso14_apdu(uint8_t * cmd, size_t cmd_len, void * data) {
1790 uint8_t real_cmd[cmd_len+4];
1791 real_cmd[0] = 0x0a; //I-Block
1792 // put block number into the PCB
1793 real_cmd[0] |= iso14_pcb_blocknum;
1794 real_cmd[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards
1795 memcpy(real_cmd+2, cmd, cmd_len);
1796 AppendCrc14443a(real_cmd,cmd_len+2);
1797
1798 ReaderTransmit(real_cmd, cmd_len+4, NULL);
1799 size_t len = ReaderReceive(data);
1800 uint8_t * data_bytes = (uint8_t *) data;
1801 if (!len)
1802 return 0; //DATA LINK ERROR
1803 // if we received an I- or R(ACK)-Block with a block number equal to the
1804 // current block number, toggle the current block number
1805 else if (len >= 4 // PCB+CID+CRC = 4 bytes
1806 && ((data_bytes[0] & 0xC0) == 0 // I-Block
1807 || (data_bytes[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0
1808 && (data_bytes[0] & 0x01) == iso14_pcb_blocknum) // equal block numbers
1809 {
1810 iso14_pcb_blocknum ^= 1;
1811 }
1812
1813 return len;
1814 }
1815
1816 //-----------------------------------------------------------------------------
1817 // Read an ISO 14443a tag. Send out commands and store answers.
1818 //
1819 //-----------------------------------------------------------------------------
1820 void ReaderIso14443a(UsbCommand *c)
1821 {
1822 iso14a_command_t param = c->arg[0];
1823 uint8_t *cmd = c->d.asBytes;
1824 size_t len = c->arg[1];
1825 size_t lenbits = c->arg[2];
1826 uint32_t arg0 = 0;
1827 byte_t buf[USB_CMD_DATA_SIZE];
1828
1829 if(param & ISO14A_CONNECT) {
1830 iso14a_clear_trace();
1831 }
1832
1833 iso14a_set_tracing(TRUE);
1834
1835 if(param & ISO14A_REQUEST_TRIGGER) {
1836 iso14a_set_trigger(TRUE);
1837 }
1838
1839 if(param & ISO14A_CONNECT) {
1840 iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
1841 if(!(param & ISO14A_NO_SELECT)) {
1842 iso14a_card_select_t *card = (iso14a_card_select_t*)buf;
1843 arg0 = iso14443a_select_card(NULL,card,NULL);
1844 cmd_send(CMD_ACK,arg0,card->uidlen,0,buf,sizeof(iso14a_card_select_t));
1845 }
1846 }
1847
1848 if(param & ISO14A_SET_TIMEOUT) {
1849 iso14a_timeout = c->arg[2];
1850 }
1851
1852 if(param & ISO14A_APDU) {
1853 arg0 = iso14_apdu(cmd, len, buf);
1854 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
1855 }
1856
1857 if(param & ISO14A_RAW) {
1858 if(param & ISO14A_APPEND_CRC) {
1859 AppendCrc14443a(cmd,len);
1860 len += 2;
1861 }
1862 if(lenbits>0) {
1863 ReaderTransmitBitsPar(cmd,lenbits,GetParity(cmd,lenbits/8), NULL);
1864 } else {
1865 ReaderTransmit(cmd,len, NULL);
1866 }
1867 arg0 = ReaderReceive(buf);
1868 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
1869 }
1870
1871 if(param & ISO14A_REQUEST_TRIGGER) {
1872 iso14a_set_trigger(FALSE);
1873 }
1874
1875 if(param & ISO14A_NO_DISCONNECT) {
1876 return;
1877 }
1878
1879 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1880 LEDsoff();
1881 }
1882
1883
1884 // Determine the distance between two nonces.
1885 // Assume that the difference is small, but we don't know which is first.
1886 // Therefore try in alternating directions.
1887 int32_t dist_nt(uint32_t nt1, uint32_t nt2) {
1888
1889 uint16_t i;
1890 uint32_t nttmp1, nttmp2;
1891
1892 if (nt1 == nt2) return 0;
1893
1894 nttmp1 = nt1;
1895 nttmp2 = nt2;
1896
1897 for (i = 1; i < 32768; i++) {
1898 nttmp1 = prng_successor(nttmp1, 1);
1899 if (nttmp1 == nt2) return i;
1900 nttmp2 = prng_successor(nttmp2, 1);
1901 if (nttmp2 == nt1) return -i;
1902 }
1903
1904 return(-99999); // either nt1 or nt2 are invalid nonces
1905 }
1906
1907
1908 //-----------------------------------------------------------------------------
1909 // Recover several bits of the cypher stream. This implements (first stages of)
1910 // the algorithm described in "The Dark Side of Security by Obscurity and
1911 // Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime"
1912 // (article by Nicolas T. Courtois, 2009)
1913 //-----------------------------------------------------------------------------
1914 void ReaderMifare(bool first_try)
1915 {
1916 // Mifare AUTH
1917 uint8_t mf_auth[] = { 0x60,0x00,0xf5,0x7b };
1918 uint8_t mf_nr_ar[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
1919 static uint8_t mf_nr_ar3;
1920
1921 uint8_t* receivedAnswer = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET);
1922
1923 iso14a_clear_trace();
1924 iso14a_set_tracing(TRUE);
1925
1926 byte_t nt_diff = 0;
1927 byte_t par = 0;
1928 //byte_t par_mask = 0xff;
1929 static byte_t par_low = 0;
1930 bool led_on = TRUE;
1931 uint8_t uid[10];
1932 uint32_t cuid;
1933
1934 uint32_t nt, previous_nt;
1935 static uint32_t nt_attacked = 0;
1936 byte_t par_list[8] = {0,0,0,0,0,0,0,0};
1937 byte_t ks_list[8] = {0,0,0,0,0,0,0,0};
1938
1939 static uint32_t sync_time;
1940 static uint32_t sync_cycles;
1941 int catch_up_cycles = 0;
1942 int last_catch_up = 0;
1943 uint16_t consecutive_resyncs = 0;
1944 int isOK = 0;
1945
1946
1947
1948 if (first_try) {
1949 mf_nr_ar3 = 0;
1950 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD);
1951 sync_time = GetCountSspClk() & 0xfffffff8;
1952 sync_cycles = 65536; // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces).
1953 nt_attacked = 0;
1954 nt = 0;
1955 par = 0;
1956 }
1957 else {
1958 // we were unsuccessful on a previous call. Try another READER nonce (first 3 parity bits remain the same)
1959 // nt_attacked = prng_successor(nt_attacked, 1);
1960 mf_nr_ar3++;
1961 mf_nr_ar[3] = mf_nr_ar3;
1962 par = par_low;
1963 }
1964
1965 LED_A_ON();
1966 LED_B_OFF();
1967 LED_C_OFF();
1968
1969
1970 for(uint16_t i = 0; TRUE; i++) {
1971
1972 WDT_HIT();
1973
1974 // Test if the action was cancelled
1975 if(BUTTON_PRESS()) {
1976 break;
1977 }
1978
1979 LED_C_ON();
1980
1981 if(!iso14443a_select_card(uid, NULL, &cuid)) {
1982 if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Can't select card");
1983 continue;
1984 }
1985
1986 sync_time = (sync_time & 0xfffffff8) + sync_cycles + catch_up_cycles;
1987 catch_up_cycles = 0;
1988
1989 // if we missed the sync time already, advance to the next nonce repeat
1990 while(GetCountSspClk() > sync_time) {
1991 sync_time = (sync_time & 0xfffffff8) + sync_cycles;
1992 }
1993
1994 // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked)
1995 ReaderTransmit(mf_auth, sizeof(mf_auth), &sync_time);
1996
1997 // Receive the (4 Byte) "random" nonce
1998 if (!ReaderReceive(receivedAnswer)) {
1999 if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Couldn't receive tag nonce");
2000 continue;
2001 }
2002
2003 previous_nt = nt;
2004 nt = bytes_to_num(receivedAnswer, 4);
2005
2006 // Transmit reader nonce with fake par
2007 ReaderTransmitPar(mf_nr_ar, sizeof(mf_nr_ar), par, NULL);
2008
2009 if (first_try && previous_nt && !nt_attacked) { // we didn't calibrate our clock yet
2010 int nt_distance = dist_nt(previous_nt, nt);
2011 if (nt_distance == 0) {
2012 nt_attacked = nt;
2013 }
2014 else {
2015 if (nt_distance == -99999) { // invalid nonce received, try again
2016 continue;
2017 }
2018 sync_cycles = (sync_cycles - nt_distance);
2019 if (MF_DBGLEVEL >= 3) Dbprintf("calibrating in cycle %d. nt_distance=%d, Sync_cycles: %d\n", i, nt_distance, sync_cycles);
2020 continue;
2021 }
2022 }
2023
2024 if ((nt != nt_attacked) && nt_attacked) { // we somehow lost sync. Try to catch up again...
2025 catch_up_cycles = -dist_nt(nt_attacked, nt);
2026 if (catch_up_cycles == 99999) { // invalid nonce received. Don't resync on that one.
2027 catch_up_cycles = 0;
2028 continue;
2029 }
2030 if (catch_up_cycles == last_catch_up) {
2031 consecutive_resyncs++;
2032 }
2033 else {
2034 last_catch_up = catch_up_cycles;
2035 consecutive_resyncs = 0;
2036 }
2037 if (consecutive_resyncs < 3) {
2038 if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i, -catch_up_cycles, consecutive_resyncs);
2039 }
2040 else {
2041 sync_cycles = sync_cycles + catch_up_cycles;
2042 if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i, -catch_up_cycles, sync_cycles);
2043 }
2044 continue;
2045 }
2046
2047 consecutive_resyncs = 0;
2048
2049 // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding
2050 if (ReaderReceive(receivedAnswer))
2051 {
2052 catch_up_cycles = 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer
2053
2054 if (nt_diff == 0)
2055 {
2056 par_low = par & 0x07; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change
2057 }
2058
2059 led_on = !led_on;
2060 if(led_on) LED_B_ON(); else LED_B_OFF();
2061
2062 par_list[nt_diff] = par;
2063 ks_list[nt_diff] = receivedAnswer[0] ^ 0x05;
2064
2065 // Test if the information is complete
2066 if (nt_diff == 0x07) {
2067 isOK = 1;
2068 break;
2069 }
2070
2071 nt_diff = (nt_diff + 1) & 0x07;
2072 mf_nr_ar[3] = (mf_nr_ar[3] & 0x1F) | (nt_diff << 5);
2073 par = par_low;
2074 } else {
2075 if (nt_diff == 0 && first_try)
2076 {
2077 par++;
2078 } else {
2079 par = (((par >> 3) + 1) << 3) | par_low;
2080 }
2081 }
2082 }
2083
2084
2085 mf_nr_ar[3] &= 0x1F;
2086
2087 byte_t buf[28];
2088 memcpy(buf + 0, uid, 4);
2089 num_to_bytes(nt, 4, buf + 4);
2090 memcpy(buf + 8, par_list, 8);
2091 memcpy(buf + 16, ks_list, 8);
2092 memcpy(buf + 24, mf_nr_ar, 4);
2093
2094 cmd_send(CMD_ACK,isOK,0,0,buf,28);
2095
2096 // Thats it...
2097 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2098 LEDsoff();
2099
2100 iso14a_set_tracing(FALSE);
2101 }
2102
2103 /**
2104 *MIFARE 1K simulate.
2105 *
2106 *@param flags :
2107 * FLAG_INTERACTIVE - In interactive mode, we are expected to finish the operation with an ACK
2108 * 4B_FLAG_UID_IN_DATA - means that there is a 4-byte UID in the data-section, we're expected to use that
2109 * 7B_FLAG_UID_IN_DATA - means that there is a 7-byte UID in the data-section, we're expected to use that
2110 * FLAG_NR_AR_ATTACK - means we should collect NR_AR responses for bruteforcing later
2111 *@param exitAfterNReads, exit simulation after n blocks have been read, 0 is inifite
2112 */
2113 void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *datain)
2114 {
2115 int cardSTATE = MFEMUL_NOFIELD;
2116 int _7BUID = 0;
2117 int vHf = 0; // in mV
2118 int res;
2119 uint32_t selTimer = 0;
2120 uint32_t authTimer = 0;
2121 uint32_t par = 0;
2122 int len = 0;
2123 uint8_t cardWRBL = 0;
2124 uint8_t cardAUTHSC = 0;
2125 uint8_t cardAUTHKEY = 0xff; // no authentication
2126 uint32_t cardRr = 0;
2127 uint32_t cuid = 0;
2128 //uint32_t rn_enc = 0;
2129 uint32_t ans = 0;
2130 uint32_t cardINTREG = 0;
2131 uint8_t cardINTBLOCK = 0;
2132 struct Crypto1State mpcs = {0, 0};
2133 struct Crypto1State *pcs;
2134 pcs = &mpcs;
2135 uint32_t numReads = 0;//Counts numer of times reader read a block
2136 uint8_t* receivedCmd = eml_get_bigbufptr_recbuf();
2137 uint8_t *response = eml_get_bigbufptr_sendbuf();
2138
2139 uint8_t rATQA[] = {0x04, 0x00}; // Mifare classic 1k 4BUID
2140 uint8_t rUIDBCC1[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2141 uint8_t rUIDBCC2[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; // !!!
2142 uint8_t rSAK[] = {0x08, 0xb6, 0xdd};
2143 uint8_t rSAK1[] = {0x04, 0xda, 0x17};
2144
2145 uint8_t rAUTH_NT[] = {0x01, 0x02, 0x03, 0x04};
2146 uint8_t rAUTH_AT[] = {0x00, 0x00, 0x00, 0x00};
2147
2148 //Here, we collect UID,NT,AR,NR,UID2,NT2,AR2,NR2
2149 // This can be used in a reader-only attack.
2150 // (it can also be retrieved via 'hf 14a list', but hey...
2151 uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0};
2152 uint8_t ar_nr_collected = 0;
2153
2154 // clear trace
2155 iso14a_clear_trace();
2156 iso14a_set_tracing(TRUE);
2157
2158 // Authenticate response - nonce
2159 uint32_t nonce = bytes_to_num(rAUTH_NT, 4);
2160
2161 //-- Determine the UID
2162 // Can be set from emulator memory, incoming data
2163 // and can be 7 or 4 bytes long
2164 if (flags & FLAG_4B_UID_IN_DATA)
2165 {
2166 // 4B uid comes from data-portion of packet
2167 memcpy(rUIDBCC1,datain,4);
2168 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2169
2170 } else if (flags & FLAG_7B_UID_IN_DATA) {
2171 // 7B uid comes from data-portion of packet
2172 memcpy(&rUIDBCC1[1],datain,3);
2173 memcpy(rUIDBCC2, datain+3, 4);
2174 _7BUID = true;
2175 } else {
2176 // get UID from emul memory
2177 emlGetMemBt(receivedCmd, 7, 1);
2178 _7BUID = !(receivedCmd[0] == 0x00);
2179 if (!_7BUID) { // ---------- 4BUID
2180 emlGetMemBt(rUIDBCC1, 0, 4);
2181 } else { // ---------- 7BUID
2182 emlGetMemBt(&rUIDBCC1[1], 0, 3);
2183 emlGetMemBt(rUIDBCC2, 3, 4);
2184 }
2185 }
2186
2187 /*
2188 * Regardless of what method was used to set the UID, set fifth byte and modify
2189 * the ATQA for 4 or 7-byte UID
2190 */
2191 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2192 if (_7BUID) {
2193 rATQA[0] = 0x44;
2194 rUIDBCC1[0] = 0x88;
2195 rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3];
2196 }
2197
2198 // We need to listen to the high-frequency, peak-detected path.
2199 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
2200
2201
2202 if (MF_DBGLEVEL >= 1) {
2203 if (!_7BUID) {
2204 Dbprintf("4B UID: %02x%02x%02x%02x",rUIDBCC1[0] , rUIDBCC1[1] , rUIDBCC1[2] , rUIDBCC1[3]);
2205 } else {
2206 Dbprintf("7B UID: (%02x)%02x%02x%02x%02x%02x%02x%02x",rUIDBCC1[0] , rUIDBCC1[1] , rUIDBCC1[2] , rUIDBCC1[3],rUIDBCC2[0],rUIDBCC2[1] ,rUIDBCC2[2] , rUIDBCC2[3]);
2207 }
2208 }
2209
2210 bool finished = FALSE;
2211 while (!BUTTON_PRESS() && !finished) {
2212 WDT_HIT();
2213
2214 // find reader field
2215 // Vref = 3300mV, and an 10:1 voltage divider on the input
2216 // can measure voltages up to 33000 mV
2217 if (cardSTATE == MFEMUL_NOFIELD) {
2218 vHf = (33000 * AvgAdc(ADC_CHAN_HF)) >> 10;
2219 if (vHf > MF_MINFIELDV) {
2220 cardSTATE_TO_IDLE();
2221 LED_A_ON();
2222 }
2223 }
2224 if(cardSTATE == MFEMUL_NOFIELD) continue;
2225
2226 //Now, get data
2227
2228 res = EmGetCmd(receivedCmd, &len);
2229 if (res == 2) { //Field is off!
2230 cardSTATE = MFEMUL_NOFIELD;
2231 LEDsoff();
2232 continue;
2233 } else if (res == 1) {
2234 break; //return value 1 means button press
2235 }
2236
2237 // REQ or WUP request in ANY state and WUP in HALTED state
2238 if (len == 1 && ((receivedCmd[0] == 0x26 && cardSTATE != MFEMUL_HALTED) || receivedCmd[0] == 0x52)) {
2239 selTimer = GetTickCount();
2240 EmSendCmdEx(rATQA, sizeof(rATQA), (receivedCmd[0] == 0x52));
2241 cardSTATE = MFEMUL_SELECT1;
2242
2243 // init crypto block
2244 LED_B_OFF();
2245 LED_C_OFF();
2246 crypto1_destroy(pcs);
2247 cardAUTHKEY = 0xff;
2248 continue;
2249 }
2250
2251 switch (cardSTATE) {
2252 case MFEMUL_NOFIELD:
2253 case MFEMUL_HALTED:
2254 case MFEMUL_IDLE:{
2255 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2256 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2257 break;
2258 }
2259 case MFEMUL_SELECT1:{
2260 // select all
2261 if (len == 2 && (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x20)) {
2262 if (MF_DBGLEVEL >= 4) Dbprintf("SELECT ALL received");
2263 EmSendCmd(rUIDBCC1, sizeof(rUIDBCC1));
2264 break;
2265 }
2266
2267 if (MF_DBGLEVEL >= 4 && len == 9 && receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 )
2268 {
2269 Dbprintf("SELECT %02x%02x%02x%02x received",receivedCmd[2],receivedCmd[3],receivedCmd[4],receivedCmd[5]);
2270 }
2271 // select card
2272 if (len == 9 &&
2273 (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC1, 4) == 0)) {
2274 EmSendCmd(_7BUID?rSAK1:rSAK, sizeof(_7BUID?rSAK1:rSAK));
2275 cuid = bytes_to_num(rUIDBCC1, 4);
2276 if (!_7BUID) {
2277 cardSTATE = MFEMUL_WORK;
2278 LED_B_ON();
2279 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer);
2280 break;
2281 } else {
2282 cardSTATE = MFEMUL_SELECT2;
2283 }
2284 }
2285 break;
2286 }
2287 case MFEMUL_AUTH1:{
2288 if( len != 8)
2289 {
2290 cardSTATE_TO_IDLE();
2291 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2292 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2293 break;
2294 }
2295 uint32_t ar = bytes_to_num(receivedCmd, 4);
2296 uint32_t nr= bytes_to_num(&receivedCmd[4], 4);
2297
2298 //Collect AR/NR
2299 if(ar_nr_collected < 2){
2300 if(ar_nr_responses[2] != ar)
2301 {// Avoid duplicates... probably not necessary, ar should vary.
2302 ar_nr_responses[ar_nr_collected*4] = cuid;
2303 ar_nr_responses[ar_nr_collected*4+1] = nonce;
2304 ar_nr_responses[ar_nr_collected*4+2] = ar;
2305 ar_nr_responses[ar_nr_collected*4+3] = nr;
2306 ar_nr_collected++;
2307 }
2308 }
2309
2310 // --- crypto
2311 crypto1_word(pcs, ar , 1);
2312 cardRr = nr ^ crypto1_word(pcs, 0, 0);
2313
2314 // test if auth OK
2315 if (cardRr != prng_successor(nonce, 64)){
2316 if (MF_DBGLEVEL >= 2) Dbprintf("AUTH FAILED. cardRr=%08x, succ=%08x",cardRr, prng_successor(nonce, 64));
2317 // Shouldn't we respond anything here?
2318 // Right now, we don't nack or anything, which causes the
2319 // reader to do a WUPA after a while. /Martin
2320 cardSTATE_TO_IDLE();
2321 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2322 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2323 break;
2324 }
2325
2326 ans = prng_successor(nonce, 96) ^ crypto1_word(pcs, 0, 0);
2327
2328 num_to_bytes(ans, 4, rAUTH_AT);
2329 // --- crypto
2330 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2331 LED_C_ON();
2332 cardSTATE = MFEMUL_WORK;
2333 if (MF_DBGLEVEL >= 4) Dbprintf("AUTH COMPLETED. sector=%d, key=%d time=%d", cardAUTHSC, cardAUTHKEY, GetTickCount() - authTimer);
2334 break;
2335 }
2336 case MFEMUL_SELECT2:{
2337 if (!len) {
2338 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2339 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2340 break;
2341 }
2342 if (len == 2 && (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x20)) {
2343 EmSendCmd(rUIDBCC2, sizeof(rUIDBCC2));
2344 break;
2345 }
2346
2347 // select 2 card
2348 if (len == 9 &&
2349 (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC2, 4) == 0)) {
2350 EmSendCmd(rSAK, sizeof(rSAK));
2351 cuid = bytes_to_num(rUIDBCC2, 4);
2352 cardSTATE = MFEMUL_WORK;
2353 LED_B_ON();
2354 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer);
2355 break;
2356 }
2357
2358 // i guess there is a command). go into the work state.
2359 if (len != 4) {
2360 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2361 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2362 break;
2363 }
2364 cardSTATE = MFEMUL_WORK;
2365 //goto lbWORK;
2366 //intentional fall-through to the next case-stmt
2367 }
2368
2369 case MFEMUL_WORK:{
2370 if (len == 0) {
2371 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2372 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2373 break;
2374 }
2375
2376 bool encrypted_data = (cardAUTHKEY != 0xFF) ;
2377
2378 if(encrypted_data) {
2379 // decrypt seqence
2380 mf_crypto1_decrypt(pcs, receivedCmd, len);
2381 }
2382
2383 if (len == 4 && (receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61)) {
2384 authTimer = GetTickCount();
2385 cardAUTHSC = receivedCmd[1] / 4; // received block num
2386 cardAUTHKEY = receivedCmd[0] - 0x60;
2387 crypto1_destroy(pcs);//Added by martin
2388 crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY));
2389
2390 if (!encrypted_data) { // first authentication
2391 if (MF_DBGLEVEL >= 2) Dbprintf("Reader authenticating for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
2392
2393 crypto1_word(pcs, cuid ^ nonce, 0);//Update crypto state
2394 num_to_bytes(nonce, 4, rAUTH_AT); // Send nonce
2395 } else { // nested authentication
2396 if (MF_DBGLEVEL >= 2) Dbprintf("Reader doing nested authentication for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
2397 ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0);
2398 num_to_bytes(ans, 4, rAUTH_AT);
2399 }
2400 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2401 //Dbprintf("Sending rAUTH %02x%02x%02x%02x", rAUTH_AT[0],rAUTH_AT[1],rAUTH_AT[2],rAUTH_AT[3]);
2402 cardSTATE = MFEMUL_AUTH1;
2403 break;
2404 }
2405
2406 // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued
2407 // BUT... ACK --> NACK
2408 if (len == 1 && receivedCmd[0] == CARD_ACK) {
2409 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2410 break;
2411 }
2412
2413 // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK)
2414 if (len == 1 && receivedCmd[0] == CARD_NACK_NA) {
2415 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2416 break;
2417 }
2418
2419 if(len != 4) {
2420 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2421 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2422 break;
2423 }
2424
2425 if(receivedCmd[0] == 0x30 // read block
2426 || receivedCmd[0] == 0xA0 // write block
2427 || receivedCmd[0] == 0xC0
2428 || receivedCmd[0] == 0xC1
2429 || receivedCmd[0] == 0xC2 // inc dec restore
2430 || receivedCmd[0] == 0xB0) { // transfer
2431 if (receivedCmd[1] >= 16 * 4) {
2432 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2433 if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate (0x%02) on out of range block: %d (0x%02x), nacking",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2434 break;
2435 }
2436
2437 if (receivedCmd[1] / 4 != cardAUTHSC) {
2438 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2439 if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate (0x%02) on block (0x%02x) not authenticated for (0x%02x), nacking",receivedCmd[0],receivedCmd[1],cardAUTHSC);
2440 break;
2441 }
2442 }
2443 // read block
2444 if (receivedCmd[0] == 0x30) {
2445 if (MF_DBGLEVEL >= 2) {
2446 Dbprintf("Reader reading block %d (0x%02x)",receivedCmd[1],receivedCmd[1]);
2447 }
2448 emlGetMem(response, receivedCmd[1], 1);
2449 AppendCrc14443a(response, 16);
2450 mf_crypto1_encrypt(pcs, response, 18, &par);
2451 EmSendCmdPar(response, 18, par);
2452 numReads++;
2453 if(exitAfterNReads > 0 && numReads == exitAfterNReads) {
2454 Dbprintf("%d reads done, exiting", numReads);
2455 finished = true;
2456 }
2457 break;
2458 }
2459 // write block
2460 if (receivedCmd[0] == 0xA0) {
2461 if (MF_DBGLEVEL >= 2) Dbprintf("RECV 0xA0 write block %d (%02x)",receivedCmd[1],receivedCmd[1]);
2462 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2463 cardSTATE = MFEMUL_WRITEBL2;
2464 cardWRBL = receivedCmd[1];
2465 break;
2466 }
2467 // increment, decrement, restore
2468 if (receivedCmd[0] == 0xC0 || receivedCmd[0] == 0xC1 || receivedCmd[0] == 0xC2) {
2469 if (MF_DBGLEVEL >= 2) Dbprintf("RECV 0x%02x inc(0xC1)/dec(0xC0)/restore(0xC2) block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2470 if (emlCheckValBl(receivedCmd[1])) {
2471 if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate on block, but emlCheckValBl failed, nacking");
2472 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2473 break;
2474 }
2475 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2476 if (receivedCmd[0] == 0xC1)
2477 cardSTATE = MFEMUL_INTREG_INC;
2478 if (receivedCmd[0] == 0xC0)
2479 cardSTATE = MFEMUL_INTREG_DEC;
2480 if (receivedCmd[0] == 0xC2)
2481 cardSTATE = MFEMUL_INTREG_REST;
2482 cardWRBL = receivedCmd[1];
2483 break;
2484 }
2485 // transfer
2486 if (receivedCmd[0] == 0xB0) {
2487 if (MF_DBGLEVEL >= 2) Dbprintf("RECV 0x%02x transfer block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2488 if (emlSetValBl(cardINTREG, cardINTBLOCK, receivedCmd[1]))
2489 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2490 else
2491 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2492 break;
2493 }
2494 // halt
2495 if (receivedCmd[0] == 0x50 && receivedCmd[1] == 0x00) {
2496 LED_B_OFF();
2497 LED_C_OFF();
2498 cardSTATE = MFEMUL_HALTED;
2499 if (MF_DBGLEVEL >= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer);
2500 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2501 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2502 break;
2503 }
2504 // RATS
2505 if (receivedCmd[0] == 0xe0) {//RATS
2506 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2507 break;
2508 }
2509 // command not allowed
2510 if (MF_DBGLEVEL >= 4) Dbprintf("Received command not allowed, nacking");
2511 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2512 break;
2513 }
2514 case MFEMUL_WRITEBL2:{
2515 if (len == 18){
2516 mf_crypto1_decrypt(pcs, receivedCmd, len);
2517 emlSetMem(receivedCmd, cardWRBL, 1);
2518 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2519 cardSTATE = MFEMUL_WORK;
2520 } else {
2521 cardSTATE_TO_IDLE();
2522 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2523 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2524 }
2525 break;
2526 }
2527
2528 case MFEMUL_INTREG_INC:{
2529 mf_crypto1_decrypt(pcs, receivedCmd, len);
2530 memcpy(&ans, receivedCmd, 4);
2531 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2532 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2533 cardSTATE_TO_IDLE();
2534 break;
2535 }
2536 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2537 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2538 cardINTREG = cardINTREG + ans;
2539 cardSTATE = MFEMUL_WORK;
2540 break;
2541 }
2542 case MFEMUL_INTREG_DEC:{
2543 mf_crypto1_decrypt(pcs, receivedCmd, len);
2544 memcpy(&ans, receivedCmd, 4);
2545 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2546 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2547 cardSTATE_TO_IDLE();
2548 break;
2549 }
2550 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2551 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2552 cardINTREG = cardINTREG - ans;
2553 cardSTATE = MFEMUL_WORK;
2554 break;
2555 }
2556 case MFEMUL_INTREG_REST:{
2557 mf_crypto1_decrypt(pcs, receivedCmd, len);
2558 memcpy(&ans, receivedCmd, 4);
2559 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2560 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2561 cardSTATE_TO_IDLE();
2562 break;
2563 }
2564 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parityBits, TRUE);
2565 LogTrace(NULL, 0, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, 0, TRUE);
2566 cardSTATE = MFEMUL_WORK;
2567 break;
2568 }
2569 }
2570 }
2571
2572 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2573 LEDsoff();
2574
2575 if(flags & FLAG_INTERACTIVE)// Interactive mode flag, means we need to send ACK
2576 {
2577 //May just aswell send the collected ar_nr in the response aswell
2578 cmd_send(CMD_ACK,CMD_SIMULATE_MIFARE_CARD,0,0,&ar_nr_responses,ar_nr_collected*4*4);
2579 }
2580
2581 if(flags & FLAG_NR_AR_ATTACK)
2582 {
2583 if(ar_nr_collected > 1) {
2584 Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
2585 Dbprintf("../tools/mfkey/mfkey32 %08x %08x %08x %08x %08x %08x",
2586 ar_nr_responses[0], // UID
2587 ar_nr_responses[1], //NT
2588 ar_nr_responses[2], //AR1
2589 ar_nr_responses[3], //NR1
2590 ar_nr_responses[6], //AR2
2591 ar_nr_responses[7] //NR2
2592 );
2593 } else {
2594 Dbprintf("Failed to obtain two AR/NR pairs!");
2595 if(ar_nr_collected >0) {
2596 Dbprintf("Only got these: UID=%08x, nonce=%08x, AR1=%08x, NR1=%08x",
2597 ar_nr_responses[0], // UID
2598 ar_nr_responses[1], //NT
2599 ar_nr_responses[2], //AR1
2600 ar_nr_responses[3] //NR1
2601 );
2602 }
2603 }
2604 }
2605 if (MF_DBGLEVEL >= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing, traceLen);
2606 }
2607
2608
2609
2610 //-----------------------------------------------------------------------------
2611 // MIFARE sniffer.
2612 //
2613 //-----------------------------------------------------------------------------
2614 void RAMFUNC SniffMifare(uint8_t param) {
2615 // param:
2616 // bit 0 - trigger from first card answer
2617 // bit 1 - trigger from first reader 7-bit request
2618
2619 // C(red) A(yellow) B(green)
2620 LEDsoff();
2621 // init trace buffer
2622 iso14a_clear_trace();
2623
2624 // The command (reader -> tag) that we're receiving.
2625 // The length of a received command will in most cases be no more than 18 bytes.
2626 // So 32 should be enough!
2627 uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET);
2628 // The response (tag -> reader) that we're receiving.
2629 uint8_t *receivedResponse = (((uint8_t *)BigBuf) + RECV_RES_OFFSET);
2630
2631 // As we receive stuff, we copy it from receivedCmd or receivedResponse
2632 // into trace, along with its length and other annotations.
2633 //uint8_t *trace = (uint8_t *)BigBuf;
2634
2635 // The DMA buffer, used to stream samples from the FPGA
2636 uint8_t *dmaBuf = ((uint8_t *)BigBuf) + DMA_BUFFER_OFFSET;
2637 uint8_t *data = dmaBuf;
2638 uint8_t previous_data = 0;
2639 int maxDataLen = 0;
2640 int dataLen = 0;
2641 bool ReaderIsActive = FALSE;
2642 bool TagIsActive = FALSE;
2643
2644 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
2645
2646 // Set up the demodulator for tag -> reader responses.
2647 Demod.output = receivedResponse;
2648
2649 // Set up the demodulator for the reader -> tag commands
2650 Uart.output = receivedCmd;
2651
2652 // Setup for the DMA.
2653 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer.
2654
2655 LED_D_OFF();
2656
2657 // init sniffer
2658 MfSniffInit();
2659
2660 // And now we loop, receiving samples.
2661 for(uint32_t sniffCounter = 0; TRUE; ) {
2662
2663 if(BUTTON_PRESS()) {
2664 DbpString("cancelled by button");
2665 break;
2666 }
2667
2668 LED_A_ON();
2669 WDT_HIT();
2670
2671 if ((sniffCounter & 0x0000FFFF) == 0) { // from time to time
2672 // check if a transaction is completed (timeout after 2000ms).
2673 // if yes, stop the DMA transfer and send what we have so far to the client
2674 if (MfSniffSend(2000)) {
2675 // Reset everything - we missed some sniffed data anyway while the DMA was stopped
2676 sniffCounter = 0;
2677 data = dmaBuf;
2678 maxDataLen = 0;
2679 ReaderIsActive = FALSE;
2680 TagIsActive = FALSE;
2681 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer.
2682 }
2683 }
2684
2685 int register readBufDataP = data - dmaBuf; // number of bytes we have processed so far
2686 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR; // number of bytes already transferred
2687 if (readBufDataP <= dmaBufDataP){ // we are processing the same block of data which is currently being transferred
2688 dataLen = dmaBufDataP - readBufDataP; // number of bytes still to be processed
2689 } else {
2690 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP; // number of bytes still to be processed
2691 }
2692 // test for length of buffer
2693 if(dataLen > maxDataLen) { // we are more behind than ever...
2694 maxDataLen = dataLen;
2695 if(dataLen > 400) {
2696 Dbprintf("blew circular buffer! dataLen=0x%x", dataLen);
2697 break;
2698 }
2699 }
2700 if(dataLen < 1) continue;
2701
2702 // primary buffer was stopped ( <-- we lost data!
2703 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
2704 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
2705 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
2706 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
2707 }
2708 // secondary buffer sets as primary, secondary buffer was stopped
2709 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
2710 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
2711 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
2712 }
2713
2714 LED_A_OFF();
2715
2716 if (sniffCounter & 0x01) {
2717
2718 if(!TagIsActive) { // no need to try decoding tag data if the reader is sending
2719 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
2720 if(MillerDecoding(readerdata, (sniffCounter-1)*4)) {
2721 LED_C_INV();
2722 if (MfSniffLogic(receivedCmd, Uart.len, Uart.parityBits, Uart.bitCount, TRUE)) break;
2723
2724 /* And ready to receive another command. */
2725 UartReset();
2726
2727 /* And also reset the demod code */
2728 DemodReset();
2729 }
2730 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
2731 }
2732
2733 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending
2734 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
2735 if(ManchesterDecoding(tagdata, 0, (sniffCounter-1)*4)) {
2736 LED_C_INV();
2737
2738 if (MfSniffLogic(receivedResponse, Demod.len, Demod.parityBits, Demod.bitCount, FALSE)) break;
2739
2740 // And ready to receive another response.
2741 DemodReset();
2742 }
2743 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
2744 }
2745 }
2746
2747 previous_data = *data;
2748 sniffCounter++;
2749 data++;
2750 if(data == dmaBuf + DMA_BUFFER_SIZE) {
2751 data = dmaBuf;
2752 }
2753
2754 } // main cycle
2755
2756 DbpString("COMMAND FINISHED");
2757
2758 FpgaDisableSscDma();
2759 MfSniffEnd();
2760
2761 Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen, Uart.state, Uart.len);
2762 LEDsoff();
2763 }
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