1 //-----------------------------------------------------------------------------
2 // Merlok - June 2011, 2012
3 // Gerhard de Koning Gans - May 2008
4 // Hagen Fritsch - June 2010
6 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
7 // at your option, any later version. See the LICENSE.txt file for the text of
9 //-----------------------------------------------------------------------------
10 // Routines to support ISO 14443 type A.
11 //-----------------------------------------------------------------------------
13 #include "proxmark3.h"
18 #include "iso14443crc.h"
19 #include "iso14443a.h"
21 #include "mifareutil.h"
25 static uint32_t iso14a_timeout
;
28 // the block number for the ISO14443-4 PCB
29 static uint8_t iso14_pcb_blocknum
= 0;
34 // minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles
35 #define REQUEST_GUARD_TIME (7000/16 + 1)
36 // minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles
37 #define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1)
38 // bool LastCommandWasRequest = FALSE;
41 // Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz)
43 // When the PM acts as reader and is receiving tag data, it takes
44 // 3 ticks delay in the AD converter
45 // 16 ticks until the modulation detector completes and sets curbit
46 // 8 ticks until bit_to_arm is assigned from curbit
47 // 8*16 ticks for the transfer from FPGA to ARM
48 // 4*16 ticks until we measure the time
49 // - 8*16 ticks because we measure the time of the previous transfer
50 #define DELAY_AIR2ARM_AS_READER (3 + 16 + 8 + 8*16 + 4*16 - 8*16)
52 // When the PM acts as a reader and is sending, it takes
53 // 4*16 ticks until we can write data to the sending hold register
54 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
55 // 8 ticks until the first transfer starts
56 // 8 ticks later the FPGA samples the data
57 // 1 tick to assign mod_sig_coil
58 #define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1)
60 // When the PM acts as tag and is receiving it takes
61 // 2 ticks delay in the RF part (for the first falling edge),
62 // 3 ticks for the A/D conversion,
63 // 8 ticks on average until the start of the SSC transfer,
64 // 8 ticks until the SSC samples the first data
65 // 7*16 ticks to complete the transfer from FPGA to ARM
66 // 8 ticks until the next ssp_clk rising edge
67 // 4*16 ticks until we measure the time
68 // - 8*16 ticks because we measure the time of the previous transfer
69 #define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16)
71 // The FPGA will report its internal sending delay in
72 uint16_t FpgaSendQueueDelay
;
73 // the 5 first bits are the number of bits buffered in mod_sig_buf
74 // the last three bits are the remaining ticks/2 after the mod_sig_buf shift
75 #define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1)
77 // When the PM acts as tag and is sending, it takes
78 // 4*16 ticks until we can write data to the sending hold register
79 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
80 // 8 ticks until the first transfer starts
81 // 8 ticks later the FPGA samples the data
82 // + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf)
83 // + 1 tick to assign mod_sig_coil
84 #define DELAY_ARM2AIR_AS_TAG (4*16 + 8*16 + 8 + 8 + DELAY_FPGA_QUEUE + 1)
86 // When the PM acts as sniffer and is receiving tag data, it takes
87 // 3 ticks A/D conversion
88 // 14 ticks to complete the modulation detection
89 // 8 ticks (on average) until the result is stored in to_arm
90 // + the delays in transferring data - which is the same for
91 // sniffing reader and tag data and therefore not relevant
92 #define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 14 + 8)
94 // When the PM acts as sniffer and is receiving reader data, it takes
95 // 2 ticks delay in analogue RF receiver (for the falling edge of the
96 // start bit, which marks the start of the communication)
97 // 3 ticks A/D conversion
98 // 8 ticks on average until the data is stored in to_arm.
99 // + the delays in transferring data - which is the same for
100 // sniffing reader and tag data and therefore not relevant
101 #define DELAY_READER_AIR2ARM_AS_SNIFFER (2 + 3 + 8)
103 //variables used for timing purposes:
104 //these are in ssp_clk cycles:
105 static uint32_t NextTransferTime
;
106 static uint32_t LastTimeProxToAirStart
;
107 static uint32_t LastProxToAirDuration
;
111 // CARD TO READER - manchester
112 // Sequence D: 11110000 modulation with subcarrier during first half
113 // Sequence E: 00001111 modulation with subcarrier during second half
114 // Sequence F: 00000000 no modulation with subcarrier
115 // READER TO CARD - miller
116 // Sequence X: 00001100 drop after half a period
117 // Sequence Y: 00000000 no drop
118 // Sequence Z: 11000000 drop at start
126 void iso14a_set_trigger(bool enable
) {
131 void iso14a_set_timeout(uint32_t timeout
) {
132 iso14a_timeout
= timeout
;
133 if(MF_DBGLEVEL
>= 3) Dbprintf("ISO14443A Timeout set to %ld (%dms)", iso14a_timeout
, iso14a_timeout
/ 106);
137 void iso14a_set_ATS_timeout(uint8_t *ats
) {
143 if (ats
[0] > 1) { // there is a format byte T0
144 if ((ats
[1] & 0x20) == 0x20) { // there is an interface byte TB(1)
145 if ((ats
[1] & 0x10) == 0x10) { // there is an interface byte TA(1) preceding TB(1)
150 fwi
= (tb1
& 0xf0) >> 4; // frame waiting indicator (FWI)
151 fwt
= 256 * 16 * (1 << fwi
); // frame waiting time (FWT) in 1/fc
153 iso14a_set_timeout(fwt
/(8*16));
159 //-----------------------------------------------------------------------------
160 // Generate the parity value for a byte sequence
162 //-----------------------------------------------------------------------------
163 void GetParity(const uint8_t *pbtCmd
, uint16_t iLen
, uint8_t *par
)
165 uint16_t paritybit_cnt
= 0;
166 uint16_t paritybyte_cnt
= 0;
167 uint8_t parityBits
= 0;
169 for (uint16_t i
= 0; i
< iLen
; i
++) {
170 // Generate the parity bits
171 parityBits
|= ((oddparity8(pbtCmd
[i
])) << (7-paritybit_cnt
));
172 if (paritybit_cnt
== 7) {
173 par
[paritybyte_cnt
] = parityBits
; // save 8 Bits parity
174 parityBits
= 0; // and advance to next Parity Byte
182 // save remaining parity bits
183 par
[paritybyte_cnt
] = parityBits
;
187 void AppendCrc14443a(uint8_t* data
, int len
)
189 ComputeCrc14443(CRC_14443_A
,data
,len
,data
+len
,data
+len
+1);
192 void AppendCrc14443b(uint8_t* data
, int len
)
194 ComputeCrc14443(CRC_14443_B
,data
,len
,data
+len
,data
+len
+1);
198 //=============================================================================
199 // ISO 14443 Type A - Miller decoder
200 //=============================================================================
202 // This decoder is used when the PM3 acts as a tag.
203 // The reader will generate "pauses" by temporarily switching of the field.
204 // At the PM3 antenna we will therefore measure a modulated antenna voltage.
205 // The FPGA does a comparison with a threshold and would deliver e.g.:
206 // ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 .......
207 // The Miller decoder needs to identify the following sequences:
208 // 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0")
209 // 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information")
210 // 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1")
211 // Note 1: the bitstream may start at any time. We therefore need to sync.
212 // Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence.
213 //-----------------------------------------------------------------------------
216 // Lookup-Table to decide if 4 raw bits are a modulation.
217 // We accept the following:
218 // 0001 - a 3 tick wide pause
219 // 0011 - a 2 tick wide pause, or a three tick wide pause shifted left
220 // 0111 - a 2 tick wide pause shifted left
221 // 1001 - a 2 tick wide pause shifted right
222 const bool Mod_Miller_LUT
[] = {
223 FALSE
, TRUE
, FALSE
, TRUE
, FALSE
, FALSE
, FALSE
, TRUE
,
224 FALSE
, TRUE
, FALSE
, FALSE
, FALSE
, FALSE
, FALSE
, FALSE
226 #define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x000000F0) >> 4])
227 #define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x0000000F)])
231 Uart
.state
= STATE_UNSYNCD
;
233 Uart
.len
= 0; // number of decoded data bytes
234 Uart
.parityLen
= 0; // number of decoded parity bytes
235 Uart
.shiftReg
= 0; // shiftreg to hold decoded data bits
236 Uart
.parityBits
= 0; // holds 8 parity bits
245 void UartInit(uint8_t *data
, uint8_t *parity
)
248 Uart
.parity
= parity
;
249 Uart
.fourBits
= 0x00000000; // clear the buffer for 4 Bits
253 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
254 static RAMFUNC
bool MillerDecoding(uint8_t bit
, uint32_t non_real_time
)
257 Uart
.fourBits
= (Uart
.fourBits
<< 8) | bit
;
259 if (Uart
.state
== STATE_UNSYNCD
) { // not yet synced
261 Uart
.syncBit
= 9999; // not set
263 // 00x11111 2|3 ticks pause followed by 6|5 ticks unmodulated Sequence Z (a "0" or "start of communication")
264 // 11111111 8 ticks unmodulation Sequence Y (a "0" or "end of communication" or "no information")
265 // 111100x1 4 ticks unmodulated followed by 2|3 ticks pause Sequence X (a "1")
267 // The start bit is one ore more Sequence Y followed by a Sequence Z (... 11111111 00x11111). We need to distinguish from
268 // Sequence X followed by Sequence Y followed by Sequence Z (111100x1 11111111 00x11111)
269 // we therefore look for a ...xx1111 11111111 00x11111xxxxxx... pattern
270 // (12 '1's followed by 2 '0's, eventually followed by another '0', followed by 5 '1's)
272 #define ISO14443A_STARTBIT_MASK 0x07FFEF80 // mask is 00001111 11111111 1110 1111 10000000
273 #define ISO14443A_STARTBIT_PATTERN 0x07FF8F80 // pattern is 00001111 11111111 1000 1111 10000000
275 if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 0)) == ISO14443A_STARTBIT_PATTERN
>> 0) Uart
.syncBit
= 7;
276 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 1)) == ISO14443A_STARTBIT_PATTERN
>> 1) Uart
.syncBit
= 6;
277 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 2)) == ISO14443A_STARTBIT_PATTERN
>> 2) Uart
.syncBit
= 5;
278 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 3)) == ISO14443A_STARTBIT_PATTERN
>> 3) Uart
.syncBit
= 4;
279 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 4)) == ISO14443A_STARTBIT_PATTERN
>> 4) Uart
.syncBit
= 3;
280 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 5)) == ISO14443A_STARTBIT_PATTERN
>> 5) Uart
.syncBit
= 2;
281 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 6)) == ISO14443A_STARTBIT_PATTERN
>> 6) Uart
.syncBit
= 1;
282 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 7)) == ISO14443A_STARTBIT_PATTERN
>> 7) Uart
.syncBit
= 0;
284 if (Uart
.syncBit
!= 9999) { // found a sync bit
285 Uart
.startTime
= non_real_time
?non_real_time
:(GetCountSspClk() & 0xfffffff8);
286 Uart
.startTime
-= Uart
.syncBit
;
287 Uart
.endTime
= Uart
.startTime
;
288 Uart
.state
= STATE_START_OF_COMMUNICATION
;
293 if (IsMillerModulationNibble1(Uart
.fourBits
>> Uart
.syncBit
)) {
294 if (IsMillerModulationNibble2(Uart
.fourBits
>> Uart
.syncBit
)) { // Modulation in both halves - error
296 } else { // Modulation in first half = Sequence Z = logic "0"
297 if (Uart
.state
== STATE_MILLER_X
) { // error - must not follow after X
301 Uart
.shiftReg
= (Uart
.shiftReg
>> 1); // add a 0 to the shiftreg
302 Uart
.state
= STATE_MILLER_Z
;
303 Uart
.endTime
= Uart
.startTime
+ 8*(9*Uart
.len
+ Uart
.bitCount
+ 1) - 6;
304 if(Uart
.bitCount
>= 9) { // if we decoded a full byte (including parity)
305 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff);
306 Uart
.parityBits
<<= 1; // make room for the parity bit
307 Uart
.parityBits
|= ((Uart
.shiftReg
>> 8) & 0x01); // store parity bit
310 if((Uart
.len
&0x0007) == 0) { // every 8 data bytes
311 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // store 8 parity bits
318 if (IsMillerModulationNibble2(Uart
.fourBits
>> Uart
.syncBit
)) { // Modulation second half = Sequence X = logic "1"
320 Uart
.shiftReg
= (Uart
.shiftReg
>> 1) | 0x100; // add a 1 to the shiftreg
321 Uart
.state
= STATE_MILLER_X
;
322 Uart
.endTime
= Uart
.startTime
+ 8*(9*Uart
.len
+ Uart
.bitCount
+ 1) - 2;
323 if(Uart
.bitCount
>= 9) { // if we decoded a full byte (including parity)
324 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff);
325 Uart
.parityBits
<<= 1; // make room for the new parity bit
326 Uart
.parityBits
|= ((Uart
.shiftReg
>> 8) & 0x01); // store parity bit
329 if ((Uart
.len
&0x0007) == 0) { // every 8 data bytes
330 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // store 8 parity bits
334 } else { // no modulation in both halves - Sequence Y
335 if (Uart
.state
== STATE_MILLER_Z
|| Uart
.state
== STATE_MILLER_Y
) { // Y after logic "0" - End of Communication
336 Uart
.state
= STATE_UNSYNCD
;
337 Uart
.bitCount
--; // last "0" was part of EOC sequence
338 Uart
.shiftReg
<<= 1; // drop it
339 if(Uart
.bitCount
> 0) { // if we decoded some bits
340 Uart
.shiftReg
>>= (9 - Uart
.bitCount
); // right align them
341 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff); // add last byte to the output
342 Uart
.parityBits
<<= 1; // add a (void) parity bit
343 Uart
.parityBits
<<= (8 - (Uart
.len
&0x0007)); // left align parity bits
344 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // and store it
346 } else if (Uart
.len
& 0x0007) { // there are some parity bits to store
347 Uart
.parityBits
<<= (8 - (Uart
.len
&0x0007)); // left align remaining parity bits
348 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // and store them
351 return TRUE
; // we are finished with decoding the raw data sequence
353 UartReset(); // Nothing received - start over
356 if (Uart
.state
== STATE_START_OF_COMMUNICATION
) { // error - must not follow directly after SOC
358 } else { // a logic "0"
360 Uart
.shiftReg
= (Uart
.shiftReg
>> 1); // add a 0 to the shiftreg
361 Uart
.state
= STATE_MILLER_Y
;
362 if(Uart
.bitCount
>= 9) { // if we decoded a full byte (including parity)
363 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff);
364 Uart
.parityBits
<<= 1; // make room for the parity bit
365 Uart
.parityBits
|= ((Uart
.shiftReg
>> 8) & 0x01); // store parity bit
368 if ((Uart
.len
&0x0007) == 0) { // every 8 data bytes
369 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // store 8 parity bits
379 return FALSE
; // not finished yet, need more data
384 //=============================================================================
385 // ISO 14443 Type A - Manchester decoder
386 //=============================================================================
388 // This decoder is used when the PM3 acts as a reader.
389 // The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage
390 // at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following:
391 // ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 .......
392 // The Manchester decoder needs to identify the following sequences:
393 // 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication")
394 // 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0
395 // 8 ticks unmodulated: Sequence F = end of communication
396 // 8 ticks modulated: A collision. Save the collision position and treat as Sequence D
397 // Note 1: the bitstream may start at any time. We therefore need to sync.
398 // Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only)
401 // Lookup-Table to decide if 4 raw bits are a modulation.
402 // We accept three or four "1" in any position
403 const bool Mod_Manchester_LUT
[] = {
404 FALSE
, FALSE
, FALSE
, FALSE
, FALSE
, FALSE
, FALSE
, TRUE
,
405 FALSE
, FALSE
, FALSE
, TRUE
, FALSE
, TRUE
, TRUE
, TRUE
408 #define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4])
409 #define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)])
414 Demod
.state
= DEMOD_UNSYNCD
;
415 Demod
.len
= 0; // number of decoded data bytes
417 Demod
.shiftReg
= 0; // shiftreg to hold decoded data bits
418 Demod
.parityBits
= 0; //
419 Demod
.collisionPos
= 0; // Position of collision bit
420 Demod
.twoBits
= 0xffff; // buffer for 2 Bits
427 Demod
.syncBit
= 0xFFFF;
431 void DemodInit(uint8_t *data
, uint8_t *parity
)
434 Demod
.parity
= parity
;
438 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
439 static RAMFUNC
int ManchesterDecoding(uint8_t bit
, uint16_t offset
, uint32_t non_real_time
)
442 Demod
.twoBits
= (Demod
.twoBits
<< 8) | bit
;
444 if (Demod
.state
== DEMOD_UNSYNCD
) {
446 if (Demod
.highCnt
< 2) { // wait for a stable unmodulated signal
447 if (Demod
.twoBits
== 0x0000) {
453 Demod
.syncBit
= 0xFFFF; // not set
454 if ((Demod
.twoBits
& 0x7700) == 0x7000) Demod
.syncBit
= 7;
455 else if ((Demod
.twoBits
& 0x3B80) == 0x3800) Demod
.syncBit
= 6;
456 else if ((Demod
.twoBits
& 0x1DC0) == 0x1C00) Demod
.syncBit
= 5;
457 else if ((Demod
.twoBits
& 0x0EE0) == 0x0E00) Demod
.syncBit
= 4;
458 else if ((Demod
.twoBits
& 0x0770) == 0x0700) Demod
.syncBit
= 3;
459 else if ((Demod
.twoBits
& 0x03B8) == 0x0380) Demod
.syncBit
= 2;
460 else if ((Demod
.twoBits
& 0x01DC) == 0x01C0) Demod
.syncBit
= 1;
461 else if ((Demod
.twoBits
& 0x00EE) == 0x00E0) Demod
.syncBit
= 0;
462 if (Demod
.syncBit
!= 0xFFFF) {
463 Demod
.startTime
= non_real_time
?non_real_time
:(GetCountSspClk() & 0xfffffff8);
464 Demod
.startTime
-= Demod
.syncBit
;
465 Demod
.bitCount
= offset
; // number of decoded data bits
466 Demod
.state
= DEMOD_MANCHESTER_DATA
;
472 if (IsManchesterModulationNibble1(Demod
.twoBits
>> Demod
.syncBit
)) { // modulation in first half
473 if (IsManchesterModulationNibble2(Demod
.twoBits
>> Demod
.syncBit
)) { // ... and in second half = collision
474 if (!Demod
.collisionPos
) {
475 Demod
.collisionPos
= (Demod
.len
<< 3) + Demod
.bitCount
;
477 } // modulation in first half only - Sequence D = 1
479 Demod
.shiftReg
= (Demod
.shiftReg
>> 1) | 0x100; // in both cases, add a 1 to the shiftreg
480 if(Demod
.bitCount
== 9) { // if we decoded a full byte (including parity)
481 Demod
.output
[Demod
.len
++] = (Demod
.shiftReg
& 0xff);
482 Demod
.parityBits
<<= 1; // make room for the parity bit
483 Demod
.parityBits
|= ((Demod
.shiftReg
>> 8) & 0x01); // store parity bit
486 if((Demod
.len
&0x0007) == 0) { // every 8 data bytes
487 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // store 8 parity bits
488 Demod
.parityBits
= 0;
491 Demod
.endTime
= Demod
.startTime
+ 8*(9*Demod
.len
+ Demod
.bitCount
+ 1) - 4;
492 } else { // no modulation in first half
493 if (IsManchesterModulationNibble2(Demod
.twoBits
>> Demod
.syncBit
)) { // and modulation in second half = Sequence E = 0
495 Demod
.shiftReg
= (Demod
.shiftReg
>> 1); // add a 0 to the shiftreg
496 if(Demod
.bitCount
>= 9) { // if we decoded a full byte (including parity)
497 Demod
.output
[Demod
.len
++] = (Demod
.shiftReg
& 0xff);
498 Demod
.parityBits
<<= 1; // make room for the new parity bit
499 Demod
.parityBits
|= ((Demod
.shiftReg
>> 8) & 0x01); // store parity bit
502 if ((Demod
.len
&0x0007) == 0) { // every 8 data bytes
503 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // store 8 parity bits1
504 Demod
.parityBits
= 0;
507 Demod
.endTime
= Demod
.startTime
+ 8*(9*Demod
.len
+ Demod
.bitCount
+ 1);
508 } else { // no modulation in both halves - End of communication
509 if(Demod
.bitCount
> 0) { // there are some remaining data bits
510 Demod
.shiftReg
>>= (9 - Demod
.bitCount
); // right align the decoded bits
511 Demod
.output
[Demod
.len
++] = Demod
.shiftReg
& 0xff; // and add them to the output
512 Demod
.parityBits
<<= 1; // add a (void) parity bit
513 Demod
.parityBits
<<= (8 - (Demod
.len
&0x0007)); // left align remaining parity bits
514 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // and store them
516 } else if (Demod
.len
& 0x0007) { // there are some parity bits to store
517 Demod
.parityBits
<<= (8 - (Demod
.len
&0x0007)); // left align remaining parity bits
518 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // and store them
521 return TRUE
; // we are finished with decoding the raw data sequence
522 } else { // nothing received. Start over
528 return FALSE
; // not finished yet, need more data
531 //=============================================================================
532 // Finally, a `sniffer' for ISO 14443 Type A
533 // Both sides of communication!
534 //=============================================================================
536 //-----------------------------------------------------------------------------
537 // Record the sequence of commands sent by the reader to the tag, with
538 // triggering so that we start recording at the point that the tag is moved
540 //-----------------------------------------------------------------------------
541 void RAMFUNC
SniffIso14443a(uint8_t param
) {
543 // bit 0 - trigger from first card answer
544 // bit 1 - trigger from first reader 7-bit request
547 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER
);
549 // Allocate memory from BigBuf for some buffers
550 // free all previous allocations first
557 // The command (reader -> tag) that we're receiving.
558 uint8_t *receivedCmd
= BigBuf_malloc(MAX_FRAME_SIZE
);
559 uint8_t *receivedCmdPar
= BigBuf_malloc(MAX_PARITY_SIZE
);
561 // The response (tag -> reader) that we're receiving.
562 uint8_t *receivedResponse
= BigBuf_malloc(MAX_FRAME_SIZE
);
563 uint8_t *receivedResponsePar
= BigBuf_malloc(MAX_PARITY_SIZE
);
565 // The DMA buffer, used to stream samples from the FPGA
566 uint8_t *dmaBuf
= BigBuf_malloc(DMA_BUFFER_SIZE
);
568 uint8_t *data
= dmaBuf
;
569 uint8_t previous_data
= 0;
572 bool TagIsActive
= FALSE
;
573 bool ReaderIsActive
= FALSE
;
575 // Set up the demodulator for tag -> reader responses.
576 DemodInit(receivedResponse
, receivedResponsePar
);
578 // Set up the demodulator for the reader -> tag commands
579 UartInit(receivedCmd
, receivedCmdPar
);
581 // Setup and start DMA.
582 FpgaSetupSscDma((uint8_t *)dmaBuf
, DMA_BUFFER_SIZE
);
584 // We won't start recording the frames that we acquire until we trigger;
585 // a good trigger condition to get started is probably when we see a
586 // response from the tag.
587 // triggered == FALSE -- to wait first for card
588 bool triggered
= !(param
& 0x03);
590 // And now we loop, receiving samples.
591 for(uint32_t rsamples
= 0; TRUE
; ) {
594 DbpString("cancelled by button");
601 int register readBufDataP
= data
- dmaBuf
;
602 int register dmaBufDataP
= DMA_BUFFER_SIZE
- AT91C_BASE_PDC_SSC
->PDC_RCR
;
603 if (readBufDataP
<= dmaBufDataP
){
604 dataLen
= dmaBufDataP
- readBufDataP
;
606 dataLen
= DMA_BUFFER_SIZE
- readBufDataP
+ dmaBufDataP
;
608 // test for length of buffer
609 if(dataLen
> maxDataLen
) {
610 maxDataLen
= dataLen
;
611 if(dataLen
> (9 * DMA_BUFFER_SIZE
/ 10)) {
612 Dbprintf("blew circular buffer! dataLen=%d", dataLen
);
616 if(dataLen
< 1) continue;
618 // primary buffer was stopped( <-- we lost data!
619 if (!AT91C_BASE_PDC_SSC
->PDC_RCR
) {
620 AT91C_BASE_PDC_SSC
->PDC_RPR
= (uint32_t) dmaBuf
;
621 AT91C_BASE_PDC_SSC
->PDC_RCR
= DMA_BUFFER_SIZE
;
622 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen
); // temporary
624 // secondary buffer sets as primary, secondary buffer was stopped
625 if (!AT91C_BASE_PDC_SSC
->PDC_RNCR
) {
626 AT91C_BASE_PDC_SSC
->PDC_RNPR
= (uint32_t) dmaBuf
;
627 AT91C_BASE_PDC_SSC
->PDC_RNCR
= DMA_BUFFER_SIZE
;
632 if (rsamples
& 0x01) { // Need two samples to feed Miller and Manchester-Decoder
634 if(!TagIsActive
) { // no need to try decoding reader data if the tag is sending
635 uint8_t readerdata
= (previous_data
& 0xF0) | (*data
>> 4);
636 if (MillerDecoding(readerdata
, (rsamples
-1)*4)) {
639 // check - if there is a short 7bit request from reader
640 if ((!triggered
) && (param
& 0x02) && (Uart
.len
== 1) && (Uart
.bitCount
== 7)) triggered
= TRUE
;
643 if (!LogTrace(receivedCmd
,
645 Uart
.startTime
*16 - DELAY_READER_AIR2ARM_AS_SNIFFER
,
646 Uart
.endTime
*16 - DELAY_READER_AIR2ARM_AS_SNIFFER
,
650 /* And ready to receive another command. */
652 /* And also reset the demod code, which might have been */
653 /* false-triggered by the commands from the reader. */
657 ReaderIsActive
= (Uart
.state
!= STATE_UNSYNCD
);
660 if(!ReaderIsActive
) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
661 uint8_t tagdata
= (previous_data
<< 4) | (*data
& 0x0F);
662 if(ManchesterDecoding(tagdata
, 0, (rsamples
-1)*4)) {
665 if (!LogTrace(receivedResponse
,
667 Demod
.startTime
*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER
,
668 Demod
.endTime
*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER
,
672 if ((!triggered
) && (param
& 0x01)) triggered
= TRUE
;
674 // And ready to receive another response.
676 // And reset the Miller decoder including itS (now outdated) input buffer
677 UartInit(receivedCmd
, receivedCmdPar
);
681 TagIsActive
= (Demod
.state
!= DEMOD_UNSYNCD
);
685 previous_data
= *data
;
688 if(data
== dmaBuf
+ DMA_BUFFER_SIZE
) {
696 Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen
, Uart
.state
, Uart
.len
);
697 Dbprintf("traceLen=%d, Uart.output[0]=%08x", BigBuf_get_traceLen(), (uint32_t)Uart
.output
[0]);
702 //-----------------------------------------------------------------------------
703 // Prepare tag messages
704 //-----------------------------------------------------------------------------
705 static void CodeIso14443aAsTagPar(const uint8_t *cmd
, uint16_t len
, uint8_t *parity
)
709 // Correction bit, might be removed when not needed
714 ToSendStuffBit(1); // 1
720 ToSend
[++ToSendMax
] = SEC_D
;
721 LastProxToAirDuration
= 8 * ToSendMax
- 4;
723 for(uint16_t i
= 0; i
< len
; i
++) {
727 for(uint16_t j
= 0; j
< 8; j
++) {
729 ToSend
[++ToSendMax
] = SEC_D
;
731 ToSend
[++ToSendMax
] = SEC_E
;
736 // Get the parity bit
737 if (parity
[i
>>3] & (0x80>>(i
&0x0007))) {
738 ToSend
[++ToSendMax
] = SEC_D
;
739 LastProxToAirDuration
= 8 * ToSendMax
- 4;
741 ToSend
[++ToSendMax
] = SEC_E
;
742 LastProxToAirDuration
= 8 * ToSendMax
;
747 ToSend
[++ToSendMax
] = SEC_F
;
749 // Convert from last byte pos to length
753 static void CodeIso14443aAsTag(const uint8_t *cmd
, uint16_t len
)
755 uint8_t par
[MAX_PARITY_SIZE
];
757 GetParity(cmd
, len
, par
);
758 CodeIso14443aAsTagPar(cmd
, len
, par
);
762 static void Code4bitAnswerAsTag(uint8_t cmd
)
768 // Correction bit, might be removed when not needed
773 ToSendStuffBit(1); // 1
779 ToSend
[++ToSendMax
] = SEC_D
;
782 for(i
= 0; i
< 4; i
++) {
784 ToSend
[++ToSendMax
] = SEC_D
;
785 LastProxToAirDuration
= 8 * ToSendMax
- 4;
787 ToSend
[++ToSendMax
] = SEC_E
;
788 LastProxToAirDuration
= 8 * ToSendMax
;
794 ToSend
[++ToSendMax
] = SEC_F
;
796 // Convert from last byte pos to length
800 //-----------------------------------------------------------------------------
801 // Wait for commands from reader
802 // Stop when button is pressed
803 // Or return TRUE when command is captured
804 //-----------------------------------------------------------------------------
805 static int GetIso14443aCommandFromReader(uint8_t *received
, uint8_t *parity
, int *len
)
807 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
808 // only, since we are receiving, not transmitting).
809 // Signal field is off with the appropriate LED
811 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
813 // Now run a `software UART' on the stream of incoming samples.
814 UartInit(received
, parity
);
817 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
822 if(BUTTON_PRESS()) return FALSE
;
824 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
825 b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
826 if(MillerDecoding(b
, 0)) {
834 static int EmSendCmd14443aRaw(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
);
835 int EmSend4bitEx(uint8_t resp
, bool correctionNeeded
);
836 int EmSend4bit(uint8_t resp
);
837 int EmSendCmdExPar(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
, uint8_t *par
);
838 int EmSendCmdEx(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
);
839 int EmSendCmd(uint8_t *resp
, uint16_t respLen
);
840 int EmSendCmdPar(uint8_t *resp
, uint16_t respLen
, uint8_t *par
);
841 bool EmLogTrace(uint8_t *reader_data
, uint16_t reader_len
, uint32_t reader_StartTime
, uint32_t reader_EndTime
, uint8_t *reader_Parity
,
842 uint8_t *tag_data
, uint16_t tag_len
, uint32_t tag_StartTime
, uint32_t tag_EndTime
, uint8_t *tag_Parity
);
844 static uint8_t* free_buffer_pointer
;
851 uint32_t ProxToAirDuration
;
852 } tag_response_info_t
;
854 bool prepare_tag_modulation(tag_response_info_t
* response_info
, size_t max_buffer_size
) {
855 // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes
856 // This will need the following byte array for a modulation sequence
857 // 144 data bits (18 * 8)
860 // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA)
861 // 1 just for the case
863 // 166 bytes, since every bit that needs to be send costs us a byte
867 // Prepare the tag modulation bits from the message
868 CodeIso14443aAsTag(response_info
->response
,response_info
->response_n
);
870 // Make sure we do not exceed the free buffer space
871 if (ToSendMax
> max_buffer_size
) {
872 Dbprintf("Out of memory, when modulating bits for tag answer:");
873 Dbhexdump(response_info
->response_n
,response_info
->response
,false);
877 // Copy the byte array, used for this modulation to the buffer position
878 memcpy(response_info
->modulation
,ToSend
,ToSendMax
);
880 // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them
881 response_info
->modulation_n
= ToSendMax
;
882 response_info
->ProxToAirDuration
= LastProxToAirDuration
;
888 // "precompile" responses. There are 7 predefined responses with a total of 28 bytes data to transmit.
889 // Coded responses need one byte per bit to transfer (data, parity, start, stop, correction)
890 // 28 * 8 data bits, 28 * 1 parity bits, 7 start bits, 7 stop bits, 7 correction bits
891 // -> need 273 bytes buffer
892 // 44 * 8 data bits, 44 * 1 parity bits, 9 start bits, 9 stop bits, 9 correction bits --370
893 // 47 * 8 data bits, 47 * 1 parity bits, 10 start bits, 10 stop bits, 10 correction bits
894 #define ALLOCATED_TAG_MODULATION_BUFFER_SIZE 453
896 bool prepare_allocated_tag_modulation(tag_response_info_t
* response_info
) {
897 // Retrieve and store the current buffer index
898 response_info
->modulation
= free_buffer_pointer
;
900 // Determine the maximum size we can use from our buffer
901 size_t max_buffer_size
= ALLOCATED_TAG_MODULATION_BUFFER_SIZE
;
903 // Forward the prepare tag modulation function to the inner function
904 if (prepare_tag_modulation(response_info
, max_buffer_size
)) {
905 // Update the free buffer offset
906 free_buffer_pointer
+= ToSendMax
;
913 //-----------------------------------------------------------------------------
914 // Main loop of simulated tag: receive commands from reader, decide what
915 // response to send, and send it.
916 //-----------------------------------------------------------------------------
917 void SimulateIso14443aTag(int tagType
, int flags
, byte_t
* data
)
919 uint32_t counters
[] = {0,0,0};
920 //Here, we collect UID,NT,AR,NR,UID2,NT2,AR2,NR2
921 // This can be used in a reader-only attack.
922 // (it can also be retrieved via 'hf 14a list', but hey...
923 uint32_t ar_nr_responses
[] = {0,0,0,0,0,0,0,0,0,0};
924 uint8_t ar_nr_collected
= 0;
928 // PACK response to PWD AUTH for EV1/NTAG
929 uint8_t response8
[4] = {0,0,0,0};
931 // The first response contains the ATQA (note: bytes are transmitted in reverse order).
932 uint8_t response1
[2] = {0,0};
935 case 1: { // MIFARE Classic
936 // Says: I am Mifare 1k - original line
941 case 2: { // MIFARE Ultralight
942 // Says: I am a stupid memory tag, no crypto
947 case 3: { // MIFARE DESFire
948 // Says: I am a DESFire tag, ph33r me
953 case 4: { // ISO/IEC 14443-4
954 // Says: I am a javacard (JCOP)
959 case 5: { // MIFARE TNP3XXX
965 case 6: { // MIFARE Mini
966 // Says: I am a Mifare Mini, 320b
972 // Says: I am a NTAG,
979 ComputeCrc14443(CRC_14443_A
, response8
, 2, &response8
[2], &response8
[3]);
982 Dbprintf("Error: unkown tagtype (%d)",tagType
);
987 // The second response contains the (mandatory) first 24 bits of the UID
988 uint8_t response2
[5] = {0x00};
990 // Check if the uid uses the (optional) part
991 uint8_t response2a
[5] = {0x00};
993 if (flags
& FLAG_7B_UID_IN_DATA
) {
995 response2
[1] = data
[0];
996 response2
[2] = data
[1];
997 response2
[3] = data
[2];
999 response2a
[0] = data
[3];
1000 response2a
[1] = data
[4];
1001 response2a
[2] = data
[5];
1002 response2a
[3] = data
[6]; //??
1003 response2a
[4] = response2a
[0] ^ response2a
[1] ^ response2a
[2] ^ response2a
[3];
1005 // Configure the ATQA and SAK accordingly
1006 response1
[0] |= 0x40;
1009 memcpy(response2
, data
, 4);
1010 //num_to_bytes(uid_1st,4,response2);
1011 // Configure the ATQA and SAK accordingly
1012 response1
[0] &= 0xBF;
1016 // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID.
1017 response2
[4] = response2
[0] ^ response2
[1] ^ response2
[2] ^ response2
[3];
1019 // Prepare the mandatory SAK (for 4 and 7 byte UID)
1020 uint8_t response3
[3] = {0x00};
1022 ComputeCrc14443(CRC_14443_A
, response3
, 1, &response3
[1], &response3
[2]);
1024 // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit
1025 uint8_t response3a
[3] = {0x00};
1026 response3a
[0] = sak
& 0xFB;
1027 ComputeCrc14443(CRC_14443_A
, response3a
, 1, &response3a
[1], &response3a
[2]);
1029 uint8_t response5
[] = { 0x00, 0x00, 0x00, 0x00 }; // Very random tag nonce
1030 uint8_t response6
[] = { 0x04, 0x58, 0x80, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS:
1031 // Format byte = 0x58: FSCI=0x08 (FSC=256), TA(1) and TC(1) present,
1032 // TA(1) = 0x80: different divisors not supported, DR = 1, DS = 1
1033 // TB(1) = not present. Defaults: FWI = 4 (FWT = 256 * 16 * 2^4 * 1/fc = 4833us), SFGI = 0 (SFG = 256 * 16 * 2^0 * 1/fc = 302us)
1034 // TC(1) = 0x02: CID supported, NAD not supported
1035 ComputeCrc14443(CRC_14443_A
, response6
, 4, &response6
[4], &response6
[5]);
1037 // Prepare GET_VERSION (different for EV-1 / NTAG)
1038 //uint8_t response7_EV1[] = {0x00, 0x04, 0x03, 0x01, 0x01, 0x00, 0x0b, 0x03, 0xfd, 0xf7}; //EV1 48bytes VERSION.
1039 uint8_t response7_NTAG
[] = {0x00, 0x04, 0x04, 0x02, 0x01, 0x00, 0x11, 0x03, 0x01, 0x9e}; //NTAG 215
1041 // Prepare CHK_TEARING
1042 uint8_t response9
[] = {0xBD,0x90,0x3f};
1044 #define TAG_RESPONSE_COUNT 10
1045 tag_response_info_t responses
[TAG_RESPONSE_COUNT
] = {
1046 { .response
= response1
, .response_n
= sizeof(response1
) }, // Answer to request - respond with card type
1047 { .response
= response2
, .response_n
= sizeof(response2
) }, // Anticollision cascade1 - respond with uid
1048 { .response
= response2a
, .response_n
= sizeof(response2a
) }, // Anticollision cascade2 - respond with 2nd half of uid if asked
1049 { .response
= response3
, .response_n
= sizeof(response3
) }, // Acknowledge select - cascade 1
1050 { .response
= response3a
, .response_n
= sizeof(response3a
) }, // Acknowledge select - cascade 2
1051 { .response
= response5
, .response_n
= sizeof(response5
) }, // Authentication answer (random nonce)
1052 { .response
= response6
, .response_n
= sizeof(response6
) }, // dummy ATS (pseudo-ATR), answer to RATS
1053 { .response
= response7_NTAG
, .response_n
= sizeof(response7_NTAG
) }, // EV1/NTAG GET_VERSION response
1054 { .response
= response8
, .response_n
= sizeof(response8
) }, // EV1/NTAG PACK response
1055 { .response
= response9
, .response_n
= sizeof(response9
) } // EV1/NTAG CHK_TEAR response
1058 // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it
1059 // Such a response is less time critical, so we can prepare them on the fly
1060 #define DYNAMIC_RESPONSE_BUFFER_SIZE 64
1061 #define DYNAMIC_MODULATION_BUFFER_SIZE 512
1062 uint8_t dynamic_response_buffer
[DYNAMIC_RESPONSE_BUFFER_SIZE
];
1063 uint8_t dynamic_modulation_buffer
[DYNAMIC_MODULATION_BUFFER_SIZE
];
1064 tag_response_info_t dynamic_response_info
= {
1065 .response
= dynamic_response_buffer
,
1067 .modulation
= dynamic_modulation_buffer
,
1071 // We need to listen to the high-frequency, peak-detected path.
1072 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
1074 BigBuf_free_keep_EM();
1076 // allocate buffers:
1077 uint8_t *receivedCmd
= BigBuf_malloc(MAX_FRAME_SIZE
);
1078 uint8_t *receivedCmdPar
= BigBuf_malloc(MAX_PARITY_SIZE
);
1079 free_buffer_pointer
= BigBuf_malloc(ALLOCATED_TAG_MODULATION_BUFFER_SIZE
);
1085 // Prepare the responses of the anticollision phase
1086 // there will be not enough time to do this at the moment the reader sends it REQA
1087 for (size_t i
=0; i
<TAG_RESPONSE_COUNT
; i
++) {
1088 prepare_allocated_tag_modulation(&responses
[i
]);
1093 // To control where we are in the protocol
1097 // Just to allow some checks
1103 tag_response_info_t
* p_response
;
1107 // Clean receive command buffer
1109 if(!GetIso14443aCommandFromReader(receivedCmd
, receivedCmdPar
, &len
)) {
1110 DbpString("Button press");
1116 // Okay, look at the command now.
1118 if(receivedCmd
[0] == 0x26) { // Received a REQUEST
1119 p_response
= &responses
[0]; order
= 1;
1120 } else if(receivedCmd
[0] == 0x52) { // Received a WAKEUP
1121 p_response
= &responses
[0]; order
= 6;
1122 } else if(receivedCmd
[1] == 0x20 && receivedCmd
[0] == 0x93) { // Received request for UID (cascade 1)
1123 p_response
= &responses
[1]; order
= 2;
1124 } else if(receivedCmd
[1] == 0x20 && receivedCmd
[0] == 0x95) { // Received request for UID (cascade 2)
1125 p_response
= &responses
[2]; order
= 20;
1126 } else if(receivedCmd
[1] == 0x70 && receivedCmd
[0] == 0x93) { // Received a SELECT (cascade 1)
1127 p_response
= &responses
[3]; order
= 3;
1128 } else if(receivedCmd
[1] == 0x70 && receivedCmd
[0] == 0x95) { // Received a SELECT (cascade 2)
1129 p_response
= &responses
[4]; order
= 30;
1130 } else if(receivedCmd
[0] == 0x30) { // Received a (plain) READ
1131 uint8_t block
= receivedCmd
[1];
1132 if ( tagType
== 7 ) {
1133 uint16_t start
= 4 * block
;
1135 /*if ( block < 4 ) {
1137 uint8_t blockdata[50] = {
1138 data[0],data[1],data[2], 0x88 ^ data[0] ^ data[1] ^ data[2],
1139 data[3],data[4],data[5],data[6],
1140 data[3] ^ data[4] ^ data[5] ^ data[6],0x48,0x0f,0xe0,
1141 0xe1,0x10,0x12,0x00,
1142 0x03,0x00,0xfe,0x00,
1143 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
1144 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
1145 0x00,0x00,0x00,0x00,
1147 AppendCrc14443a(blockdata+start, 16);
1148 EmSendCmdEx( blockdata+start, MAX_MIFARE_FRAME_SIZE, false);
1150 uint8_t emdata
[MAX_MIFARE_FRAME_SIZE
];
1151 emlGetMemBt( emdata
, start
, 16);
1152 AppendCrc14443a(emdata
, 16);
1153 EmSendCmdEx(emdata
, sizeof(emdata
), false);
1158 EmSendCmdEx(data
+(4*block
),16,false);
1159 // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]);
1160 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
1163 } else if(receivedCmd
[0] == 0x3A) { // Received a FAST READ (ranged read)
1165 uint8_t emdata
[MAX_FRAME_SIZE
];
1166 int start
= receivedCmd
[1] * 4;
1167 int len
= (receivedCmd
[2] - receivedCmd
[1] + 1) * 4;
1168 emlGetMemBt( emdata
, start
, len
);
1169 AppendCrc14443a(emdata
, len
);
1170 EmSendCmdEx(emdata
, len
+2, false);
1173 } else if(receivedCmd
[0] == 0x3C && tagType
== 7) { // Received a READ SIGNATURE --
1174 // ECC data, taken from a NTAG215 amiibo token. might work. LEN: 32, + 2 crc
1175 uint8_t data
[] = {0x56,0x06,0xa6,0x4f,0x43,0x32,0x53,0x6f,
1176 0x43,0xda,0x45,0xd6,0x61,0x38,0xaa,0x1e,
1177 0xcf,0xd3,0x61,0x36,0xca,0x5f,0xbb,0x05,
1178 0xce,0x21,0x24,0x5b,0xa6,0x7a,0x79,0x07,
1180 AppendCrc14443a(data
, sizeof(data
)-2);
1181 EmSendCmdEx(data
,sizeof(data
),false);
1183 } else if (receivedCmd
[0] == 0x39 && tagType
== 7) { // Received a READ COUNTER --
1184 uint8_t index
= receivedCmd
[1];
1185 uint8_t data
[] = {0x00,0x00,0x00,0x14,0xa5};
1186 if ( counters
[index
] > 0) {
1187 num_to_bytes(counters
[index
], 3, data
);
1188 AppendCrc14443a(data
, sizeof(data
)-2);
1190 EmSendCmdEx(data
,sizeof(data
),false);
1192 } else if (receivedCmd
[0] == 0xA5 && tagType
== 7) { // Received a INC COUNTER --
1193 // number of counter
1194 uint8_t counter
= receivedCmd
[1];
1195 uint32_t val
= bytes_to_num(receivedCmd
+2,4);
1196 counters
[counter
] = val
;
1199 uint8_t ack
[] = {0x0a};
1200 EmSendCmdEx(ack
,sizeof(ack
),false);
1203 } else if(receivedCmd
[0] == 0x3E && tagType
== 7) { // Received a CHECK_TEARING_EVENT --
1204 p_response
= &responses
[9];
1205 } else if(receivedCmd
[0] == 0x50) { // Received a HALT
1208 LogTrace(receivedCmd
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
1211 } else if(receivedCmd
[0] == 0x60 || receivedCmd
[0] == 0x61) { // Received an authentication request
1213 if ( tagType
== 7 ) { // IF NTAG /EV1 0x60 == GET_VERSION, not a authentication request.
1214 p_response
= &responses
[7];
1216 p_response
= &responses
[5]; order
= 7;
1218 } else if(receivedCmd
[0] == 0xE0) { // Received a RATS request
1219 if (tagType
== 1 || tagType
== 2) { // RATS not supported
1220 EmSend4bit(CARD_NACK_NA
);
1223 p_response
= &responses
[6]; order
= 70;
1225 } else if (order
== 7 && len
== 8) { // Received {nr] and {ar} (part of authentication)
1227 LogTrace(receivedCmd
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
1229 uint32_t nonce
= bytes_to_num(response5
,4);
1230 uint32_t nr
= bytes_to_num(receivedCmd
,4);
1231 uint32_t ar
= bytes_to_num(receivedCmd
+4,4);
1232 //Dbprintf("Auth attempt {nonce}{nr}{ar}: %08x %08x %08x", nonce, nr, ar);
1234 if(flags
& FLAG_NR_AR_ATTACK
)
1236 if(ar_nr_collected
< 2){
1237 // Avoid duplicates... probably not necessary, nr should vary.
1238 //if(ar_nr_responses[3] != nr){
1239 ar_nr_responses
[ar_nr_collected
*5] = 0;
1240 ar_nr_responses
[ar_nr_collected
*5+1] = 0;
1241 ar_nr_responses
[ar_nr_collected
*5+2] = nonce
;
1242 ar_nr_responses
[ar_nr_collected
*5+3] = nr
;
1243 ar_nr_responses
[ar_nr_collected
*5+4] = ar
;
1248 if(ar_nr_collected
> 1 ) {
1250 if (MF_DBGLEVEL
>= 2) {
1251 Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
1252 Dbprintf("../tools/mfkey/mfkey32 %07x%08x %08x %08x %08x %08x %08x",
1253 ar_nr_responses
[0], // UID1
1254 ar_nr_responses
[1], // UID2
1255 ar_nr_responses
[2], // NT
1256 ar_nr_responses
[3], // AR1
1257 ar_nr_responses
[4], // NR1
1258 ar_nr_responses
[8], // AR2
1259 ar_nr_responses
[9] // NR2
1261 Dbprintf("../tools/mfkey/mfkey32v2 %06x%08x %08x %08x %08x %08x %08x %08x",
1262 ar_nr_responses
[0], // UID1
1263 ar_nr_responses
[1], // UID2
1264 ar_nr_responses
[2], // NT1
1265 ar_nr_responses
[3], // AR1
1266 ar_nr_responses
[4], // NR1
1267 ar_nr_responses
[7], // NT2
1268 ar_nr_responses
[8], // AR2
1269 ar_nr_responses
[9] // NR2
1272 uint8_t len
= ar_nr_collected
*5*4;
1273 cmd_send(CMD_ACK
,CMD_SIMULATE_MIFARE_CARD
,len
,0,&ar_nr_responses
,len
);
1274 ar_nr_collected
= 0;
1275 memset(ar_nr_responses
, 0x00, len
);
1278 } else if (receivedCmd
[0] == 0x1a ) // ULC authentication
1282 else if (receivedCmd
[0] == 0x1b) // NTAG / EV-1 authentication
1284 if ( tagType
== 7 ) {
1285 p_response
= &responses
[8]; // PACK response
1286 uint32_t pwd
= bytes_to_num(receivedCmd
+1,4);
1288 if ( MF_DBGLEVEL
>= 3) Dbprintf("Auth attempt: %08x", pwd
);
1292 // Check for ISO 14443A-4 compliant commands, look at left nibble
1293 switch (receivedCmd
[0]) {
1295 case 0x03: { // IBlock (command no CID)
1296 dynamic_response_info
.response
[0] = receivedCmd
[0];
1297 dynamic_response_info
.response
[1] = 0x90;
1298 dynamic_response_info
.response
[2] = 0x00;
1299 dynamic_response_info
.response_n
= 3;
1302 case 0x0A: { // IBlock (command CID)
1303 dynamic_response_info
.response
[0] = receivedCmd
[0];
1304 dynamic_response_info
.response
[1] = 0x00;
1305 dynamic_response_info
.response
[2] = 0x90;
1306 dynamic_response_info
.response
[3] = 0x00;
1307 dynamic_response_info
.response_n
= 4;
1311 case 0x1B: { // Chaining command
1312 dynamic_response_info
.response
[0] = 0xaa | ((receivedCmd
[0]) & 1);
1313 dynamic_response_info
.response_n
= 2;
1318 dynamic_response_info
.response
[0] = receivedCmd
[0] ^ 0x11;
1319 dynamic_response_info
.response_n
= 2;
1322 case 0xBA: { // ping / pong
1323 dynamic_response_info
.response
[0] = 0xAB;
1324 dynamic_response_info
.response
[1] = 0x00;
1325 dynamic_response_info
.response_n
= 2;
1329 case 0xC2: { // Readers sends deselect command
1330 dynamic_response_info
.response
[0] = 0xCA;
1331 dynamic_response_info
.response
[1] = 0x00;
1332 dynamic_response_info
.response_n
= 2;
1336 // Never seen this command before
1338 LogTrace(receivedCmd
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
1340 Dbprintf("Received unknown command (len=%d):",len
);
1341 Dbhexdump(len
,receivedCmd
,false);
1343 dynamic_response_info
.response_n
= 0;
1347 if (dynamic_response_info
.response_n
> 0) {
1348 // Copy the CID from the reader query
1349 dynamic_response_info
.response
[1] = receivedCmd
[1];
1351 // Add CRC bytes, always used in ISO 14443A-4 compliant cards
1352 AppendCrc14443a(dynamic_response_info
.response
,dynamic_response_info
.response_n
);
1353 dynamic_response_info
.response_n
+= 2;
1355 if (prepare_tag_modulation(&dynamic_response_info
,DYNAMIC_MODULATION_BUFFER_SIZE
) == false) {
1356 Dbprintf("Error preparing tag response");
1358 LogTrace(receivedCmd
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
1362 p_response
= &dynamic_response_info
;
1366 // Count number of wakeups received after a halt
1367 if(order
== 6 && lastorder
== 5) { happened
++; }
1369 // Count number of other messages after a halt
1370 if(order
!= 6 && lastorder
== 5) { happened2
++; }
1372 if(cmdsRecvd
> 999) {
1373 DbpString("1000 commands later...");
1378 if (p_response
!= NULL
) {
1379 EmSendCmd14443aRaw(p_response
->modulation
, p_response
->modulation_n
, receivedCmd
[0] == 0x52);
1380 // do the tracing for the previous reader request and this tag answer:
1381 uint8_t par
[MAX_PARITY_SIZE
];
1382 GetParity(p_response
->response
, p_response
->response_n
, par
);
1384 EmLogTrace(Uart
.output
,
1386 Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1387 Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1389 p_response
->response
,
1390 p_response
->response_n
,
1391 LastTimeProxToAirStart
*16 + DELAY_ARM2AIR_AS_TAG
,
1392 (LastTimeProxToAirStart
+ p_response
->ProxToAirDuration
)*16 + DELAY_ARM2AIR_AS_TAG
,
1397 Dbprintf("Trace Full. Simulation stopped.");
1402 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
1404 BigBuf_free_keep_EM();
1407 if (MF_DBGLEVEL
>= 4){
1408 Dbprintf("-[ Wake ups after halt [%d]", happened
);
1409 Dbprintf("-[ Messages after halt [%d]", happened2
);
1410 Dbprintf("-[ Num of received cmd [%d]", cmdsRecvd
);
1415 // prepare a delayed transfer. This simply shifts ToSend[] by a number
1416 // of bits specified in the delay parameter.
1417 void PrepareDelayedTransfer(uint16_t delay
)
1419 uint8_t bitmask
= 0;
1420 uint8_t bits_to_shift
= 0;
1421 uint8_t bits_shifted
= 0;
1425 for (uint16_t i
= 0; i
< delay
; i
++) {
1426 bitmask
|= (0x01 << i
);
1428 ToSend
[ToSendMax
++] = 0x00;
1429 for (uint16_t i
= 0; i
< ToSendMax
; i
++) {
1430 bits_to_shift
= ToSend
[i
] & bitmask
;
1431 ToSend
[i
] = ToSend
[i
] >> delay
;
1432 ToSend
[i
] = ToSend
[i
] | (bits_shifted
<< (8 - delay
));
1433 bits_shifted
= bits_to_shift
;
1439 //-------------------------------------------------------------------------------------
1440 // Transmit the command (to the tag) that was placed in ToSend[].
1441 // Parameter timing:
1442 // if NULL: transfer at next possible time, taking into account
1443 // request guard time and frame delay time
1444 // if == 0: transfer immediately and return time of transfer
1445 // if != 0: delay transfer until time specified
1446 //-------------------------------------------------------------------------------------
1447 static void TransmitFor14443a(const uint8_t *cmd
, uint16_t len
, uint32_t *timing
)
1450 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_READER_MOD
);
1452 uint32_t ThisTransferTime
= 0;
1455 if(*timing
== 0) { // Measure time
1456 *timing
= (GetCountSspClk() + 8) & 0xfffffff8;
1458 PrepareDelayedTransfer(*timing
& 0x00000007); // Delay transfer (fine tuning - up to 7 MF clock ticks)
1460 if(MF_DBGLEVEL
>= 4 && GetCountSspClk() >= (*timing
& 0xfffffff8)) Dbprintf("TransmitFor14443a: Missed timing");
1461 while(GetCountSspClk() < (*timing
& 0xfffffff8)); // Delay transfer (multiple of 8 MF clock ticks)
1462 LastTimeProxToAirStart
= *timing
;
1464 ThisTransferTime
= ((MAX(NextTransferTime
, GetCountSspClk()) & 0xfffffff8) + 8);
1465 while(GetCountSspClk() < ThisTransferTime
);
1466 LastTimeProxToAirStart
= ThisTransferTime
;
1470 AT91C_BASE_SSC
->SSC_THR
= SEC_Y
;
1474 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1475 AT91C_BASE_SSC
->SSC_THR
= cmd
[c
];
1483 NextTransferTime
= MAX(NextTransferTime
, LastTimeProxToAirStart
+ REQUEST_GUARD_TIME
);
1487 //-----------------------------------------------------------------------------
1488 // Prepare reader command (in bits, support short frames) to send to FPGA
1489 //-----------------------------------------------------------------------------
1490 void CodeIso14443aBitsAsReaderPar(const uint8_t *cmd
, uint16_t bits
, const uint8_t *parity
)
1498 // Start of Communication (Seq. Z)
1499 ToSend
[++ToSendMax
] = SEC_Z
;
1500 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1503 size_t bytecount
= nbytes(bits
);
1504 // Generate send structure for the data bits
1505 for (i
= 0; i
< bytecount
; i
++) {
1506 // Get the current byte to send
1508 size_t bitsleft
= MIN((bits
-(i
*8)),8);
1510 for (j
= 0; j
< bitsleft
; j
++) {
1513 ToSend
[++ToSendMax
] = SEC_X
;
1514 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 2;
1519 ToSend
[++ToSendMax
] = SEC_Z
;
1520 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1523 ToSend
[++ToSendMax
] = SEC_Y
;
1530 // Only transmit parity bit if we transmitted a complete byte
1531 if (j
== 8 && parity
!= NULL
) {
1532 // Get the parity bit
1533 if (parity
[i
>>3] & (0x80 >> (i
&0x0007))) {
1535 ToSend
[++ToSendMax
] = SEC_X
;
1536 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 2;
1541 ToSend
[++ToSendMax
] = SEC_Z
;
1542 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1545 ToSend
[++ToSendMax
] = SEC_Y
;
1552 // End of Communication: Logic 0 followed by Sequence Y
1555 ToSend
[++ToSendMax
] = SEC_Z
;
1556 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1559 ToSend
[++ToSendMax
] = SEC_Y
;
1562 ToSend
[++ToSendMax
] = SEC_Y
;
1564 // Convert to length of command:
1568 //-----------------------------------------------------------------------------
1569 // Prepare reader command to send to FPGA
1570 //-----------------------------------------------------------------------------
1571 void CodeIso14443aAsReaderPar(const uint8_t *cmd
, uint16_t len
, const uint8_t *parity
)
1573 CodeIso14443aBitsAsReaderPar(cmd
, len
*8, parity
);
1577 //-----------------------------------------------------------------------------
1578 // Wait for commands from reader
1579 // Stop when button is pressed (return 1) or field was gone (return 2)
1580 // Or return 0 when command is captured
1581 //-----------------------------------------------------------------------------
1582 static int EmGetCmd(uint8_t *received
, uint16_t *len
, uint8_t *parity
)
1586 uint32_t timer
= 0, vtime
= 0;
1590 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1591 // only, since we are receiving, not transmitting).
1592 // Signal field is off with the appropriate LED
1594 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
1596 // Set ADC to read field strength
1597 AT91C_BASE_ADC
->ADC_CR
= AT91C_ADC_SWRST
;
1598 AT91C_BASE_ADC
->ADC_MR
=
1599 ADC_MODE_PRESCALE(63) |
1600 ADC_MODE_STARTUP_TIME(1) |
1601 ADC_MODE_SAMPLE_HOLD_TIME(15);
1602 AT91C_BASE_ADC
->ADC_CHER
= ADC_CHANNEL(ADC_CHAN_HF
);
1604 AT91C_BASE_ADC
->ADC_CR
= AT91C_ADC_START
;
1606 // Now run a 'software UART' on the stream of incoming samples.
1607 UartInit(received
, parity
);
1610 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1615 if (BUTTON_PRESS()) return 1;
1617 // test if the field exists
1618 if (AT91C_BASE_ADC
->ADC_SR
& ADC_END_OF_CONVERSION(ADC_CHAN_HF
)) {
1620 analogAVG
+= AT91C_BASE_ADC
->ADC_CDR
[ADC_CHAN_HF
];
1621 AT91C_BASE_ADC
->ADC_CR
= AT91C_ADC_START
;
1622 if (analogCnt
>= 32) {
1623 if ((MAX_ADC_HF_VOLTAGE
* (analogAVG
/ analogCnt
) >> 10) < MF_MINFIELDV
) {
1624 vtime
= GetTickCount();
1625 if (!timer
) timer
= vtime
;
1626 // 50ms no field --> card to idle state
1627 if (vtime
- timer
> 50) return 2;
1629 if (timer
) timer
= 0;
1635 // receive and test the miller decoding
1636 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
1637 b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1638 if(MillerDecoding(b
, 0)) {
1648 static int EmSendCmd14443aRaw(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
)
1652 uint32_t ThisTransferTime
;
1654 // Modulate Manchester
1655 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_TAGSIM_MOD
);
1657 // include correction bit if necessary
1658 if (Uart
.parityBits
& 0x01) {
1659 correctionNeeded
= TRUE
;
1661 if(correctionNeeded
) {
1662 // 1236, so correction bit needed
1668 // clear receiving shift register and holding register
1669 while(!(AT91C_BASE_SSC
->SSC_SR
& AT91C_SSC_RXRDY
));
1670 b
= AT91C_BASE_SSC
->SSC_RHR
; (void) b
;
1671 while(!(AT91C_BASE_SSC
->SSC_SR
& AT91C_SSC_RXRDY
));
1672 b
= AT91C_BASE_SSC
->SSC_RHR
; (void) b
;
1674 // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line)
1675 for (uint16_t j
= 0; j
< 5; j
++) { // allow timeout - better late than never
1676 while(!(AT91C_BASE_SSC
->SSC_SR
& AT91C_SSC_RXRDY
));
1677 if (AT91C_BASE_SSC
->SSC_RHR
) break;
1680 while ((ThisTransferTime
= GetCountSspClk()) & 0x00000007);
1683 AT91C_BASE_SSC
->SSC_THR
= SEC_F
;
1686 for(; i
< respLen
; ) {
1687 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1688 AT91C_BASE_SSC
->SSC_THR
= resp
[i
++];
1689 FpgaSendQueueDelay
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1692 if(BUTTON_PRESS()) break;
1695 // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again:
1696 uint8_t fpga_queued_bits
= FpgaSendQueueDelay
>> 3;
1697 for (i
= 0; i
<= fpga_queued_bits
/8 + 1; ) {
1698 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1699 AT91C_BASE_SSC
->SSC_THR
= SEC_F
;
1700 FpgaSendQueueDelay
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1705 LastTimeProxToAirStart
= ThisTransferTime
+ (correctionNeeded
?8:0);
1710 int EmSend4bitEx(uint8_t resp
, bool correctionNeeded
){
1711 Code4bitAnswerAsTag(resp
);
1712 int res
= EmSendCmd14443aRaw(ToSend
, ToSendMax
, correctionNeeded
);
1713 // do the tracing for the previous reader request and this tag answer:
1715 GetParity(&resp
, 1, par
);
1716 EmLogTrace(Uart
.output
,
1718 Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1719 Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1723 LastTimeProxToAirStart
*16 + DELAY_ARM2AIR_AS_TAG
,
1724 (LastTimeProxToAirStart
+ LastProxToAirDuration
)*16 + DELAY_ARM2AIR_AS_TAG
,
1729 int EmSend4bit(uint8_t resp
){
1730 return EmSend4bitEx(resp
, false);
1733 int EmSendCmdExPar(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
, uint8_t *par
){
1734 CodeIso14443aAsTagPar(resp
, respLen
, par
);
1735 int res
= EmSendCmd14443aRaw(ToSend
, ToSendMax
, correctionNeeded
);
1736 // do the tracing for the previous reader request and this tag answer:
1737 EmLogTrace(Uart
.output
,
1739 Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1740 Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1744 LastTimeProxToAirStart
*16 + DELAY_ARM2AIR_AS_TAG
,
1745 (LastTimeProxToAirStart
+ LastProxToAirDuration
)*16 + DELAY_ARM2AIR_AS_TAG
,
1750 int EmSendCmdEx(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
){
1751 uint8_t par
[MAX_PARITY_SIZE
];
1752 GetParity(resp
, respLen
, par
);
1753 return EmSendCmdExPar(resp
, respLen
, correctionNeeded
, par
);
1756 int EmSendCmd(uint8_t *resp
, uint16_t respLen
){
1757 uint8_t par
[MAX_PARITY_SIZE
];
1758 GetParity(resp
, respLen
, par
);
1759 return EmSendCmdExPar(resp
, respLen
, false, par
);
1762 int EmSendCmdPar(uint8_t *resp
, uint16_t respLen
, uint8_t *par
){
1763 return EmSendCmdExPar(resp
, respLen
, false, par
);
1766 bool EmLogTrace(uint8_t *reader_data
, uint16_t reader_len
, uint32_t reader_StartTime
, uint32_t reader_EndTime
, uint8_t *reader_Parity
,
1767 uint8_t *tag_data
, uint16_t tag_len
, uint32_t tag_StartTime
, uint32_t tag_EndTime
, uint8_t *tag_Parity
)
1770 // we cannot exactly measure the end and start of a received command from reader. However we know that the delay from
1771 // end of the received command to start of the tag's (simulated by us) answer is n*128+20 or n*128+84 resp.
1772 // with n >= 9. The start of the tags answer can be measured and therefore the end of the received command be calculated:
1773 uint16_t reader_modlen
= reader_EndTime
- reader_StartTime
;
1774 uint16_t approx_fdt
= tag_StartTime
- reader_EndTime
;
1775 uint16_t exact_fdt
= (approx_fdt
- 20 + 32)/64 * 64 + 20;
1776 reader_EndTime
= tag_StartTime
- exact_fdt
;
1777 reader_StartTime
= reader_EndTime
- reader_modlen
;
1778 if (!LogTrace(reader_data
, reader_len
, reader_StartTime
, reader_EndTime
, reader_Parity
, TRUE
)) {
1780 } else return(!LogTrace(tag_data
, tag_len
, tag_StartTime
, tag_EndTime
, tag_Parity
, FALSE
));
1786 //-----------------------------------------------------------------------------
1787 // Wait a certain time for tag response
1788 // If a response is captured return TRUE
1789 // If it takes too long return FALSE
1790 //-----------------------------------------------------------------------------
1791 static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse
, uint8_t *receivedResponsePar
, uint16_t offset
)
1795 // Set FPGA mode to "reader listen mode", no modulation (listen
1796 // only, since we are receiving, not transmitting).
1797 // Signal field is on with the appropriate LED
1799 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_READER_LISTEN
);
1801 // Now get the answer from the card
1802 DemodInit(receivedResponse
, receivedResponsePar
);
1805 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1810 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
1811 b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1812 if(ManchesterDecoding(b
, offset
, 0)) {
1813 NextTransferTime
= MAX(NextTransferTime
, Demod
.endTime
- (DELAY_AIR2ARM_AS_READER
+ DELAY_ARM2AIR_AS_READER
)/16 + FRAME_DELAY_TIME_PICC_TO_PCD
);
1815 } else if (c
++ > iso14a_timeout
&& Demod
.state
== DEMOD_UNSYNCD
) {
1822 void ReaderTransmitBitsPar(uint8_t* frame
, uint16_t bits
, uint8_t *par
, uint32_t *timing
)
1824 CodeIso14443aBitsAsReaderPar(frame
, bits
, par
);
1826 // Send command to tag
1827 TransmitFor14443a(ToSend
, ToSendMax
, timing
);
1831 // Log reader command in trace buffer
1833 LogTrace(frame
, nbytes(bits
), LastTimeProxToAirStart
*16 + DELAY_ARM2AIR_AS_READER
, (LastTimeProxToAirStart
+ LastProxToAirDuration
)*16 + DELAY_ARM2AIR_AS_READER
, par
, TRUE
);
1837 void ReaderTransmitPar(uint8_t* frame
, uint16_t len
, uint8_t *par
, uint32_t *timing
)
1839 ReaderTransmitBitsPar(frame
, len
*8, par
, timing
);
1842 void ReaderTransmitBits(uint8_t* frame
, uint16_t len
, uint32_t *timing
)
1844 // Generate parity and redirect
1845 uint8_t par
[MAX_PARITY_SIZE
];
1846 GetParity(frame
, len
/8, par
);
1847 ReaderTransmitBitsPar(frame
, len
, par
, timing
);
1850 void ReaderTransmit(uint8_t* frame
, uint16_t len
, uint32_t *timing
)
1852 // Generate parity and redirect
1853 uint8_t par
[MAX_PARITY_SIZE
];
1854 GetParity(frame
, len
, par
);
1855 ReaderTransmitBitsPar(frame
, len
*8, par
, timing
);
1858 int ReaderReceiveOffset(uint8_t* receivedAnswer
, uint16_t offset
, uint8_t *parity
)
1860 if (!GetIso14443aAnswerFromTag(receivedAnswer
, parity
, offset
)) return FALSE
;
1862 LogTrace(receivedAnswer
, Demod
.len
, Demod
.startTime
*16 - DELAY_AIR2ARM_AS_READER
, Demod
.endTime
*16 - DELAY_AIR2ARM_AS_READER
, parity
, FALSE
);
1867 int ReaderReceive(uint8_t *receivedAnswer
, uint8_t *parity
)
1869 if (!GetIso14443aAnswerFromTag(receivedAnswer
, parity
, 0)) return FALSE
;
1871 LogTrace(receivedAnswer
, Demod
.len
, Demod
.startTime
*16 - DELAY_AIR2ARM_AS_READER
, Demod
.endTime
*16 - DELAY_AIR2ARM_AS_READER
, parity
, FALSE
);
1876 // performs iso14443a anticollision (optional) and card select procedure
1877 // fills the uid and cuid pointer unless NULL
1878 // fills the card info record unless NULL
1879 // if anticollision is false, then the UID must be provided in uid_ptr[]
1880 // and num_cascades must be set (1: 4 Byte UID, 2: 7 Byte UID, 3: 10 Byte UID)
1881 int iso14443a_select_card(byte_t
*uid_ptr
, iso14a_card_select_t
*p_hi14a_card
, uint32_t *cuid_ptr
, bool anticollision
, uint8_t num_cascades
) {
1882 uint8_t wupa
[] = { 0x52 }; // 0x26 - REQA 0x52 - WAKE-UP
1883 uint8_t sel_all
[] = { 0x93,0x20 };
1884 uint8_t sel_uid
[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
1885 uint8_t rats
[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
1886 uint8_t resp
[MAX_FRAME_SIZE
]; // theoretically. A usual RATS will be much smaller
1887 uint8_t resp_par
[MAX_PARITY_SIZE
];
1889 size_t uid_resp_len
;
1891 uint8_t sak
= 0x04; // cascade uid
1892 int cascade_level
= 0;
1895 // Broadcast for a card, WUPA (0x52) will force response from all cards in the field
1896 ReaderTransmitBitsPar(wupa
, 7, NULL
, NULL
);
1899 if(!ReaderReceive(resp
, resp_par
)) return 0;
1902 memcpy(p_hi14a_card
->atqa
, resp
, 2);
1903 p_hi14a_card
->uidlen
= 0;
1904 memset(p_hi14a_card
->uid
,0,10);
1907 if (anticollision
) {
1910 memset(uid_ptr
,0,10);
1914 // check for proprietary anticollision:
1915 if ((resp
[0] & 0x1F) == 0) {
1919 // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in
1920 // which case we need to make a cascade 2 request and select - this is a long UID
1921 // While the UID is not complete, the 3nd bit (from the right) is set in the SAK.
1922 for(; sak
& 0x04; cascade_level
++) {
1923 // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97)
1924 sel_uid
[0] = sel_all
[0] = 0x93 + cascade_level
* 2;
1926 if (anticollision
) {
1928 ReaderTransmit(sel_all
, sizeof(sel_all
), NULL
);
1929 if (!ReaderReceive(resp
, resp_par
)) return 0;
1931 if (Demod
.collisionPos
) { // we had a collision and need to construct the UID bit by bit
1932 memset(uid_resp
, 0, 4);
1933 uint16_t uid_resp_bits
= 0;
1934 uint16_t collision_answer_offset
= 0;
1935 // anti-collision-loop:
1936 while (Demod
.collisionPos
) {
1937 Dbprintf("Multiple tags detected. Collision after Bit %d", Demod
.collisionPos
);
1938 for (uint16_t i
= collision_answer_offset
; i
< Demod
.collisionPos
; i
++, uid_resp_bits
++) { // add valid UID bits before collision point
1939 uint16_t UIDbit
= (resp
[i
/8] >> (i
% 8)) & 0x01;
1940 uid_resp
[uid_resp_bits
/ 8] |= UIDbit
<< (uid_resp_bits
% 8);
1942 uid_resp
[uid_resp_bits
/8] |= 1 << (uid_resp_bits
% 8); // next time select the card(s) with a 1 in the collision position
1944 // construct anticollosion command:
1945 sel_uid
[1] = ((2 + uid_resp_bits
/8) << 4) | (uid_resp_bits
& 0x07); // length of data in bytes and bits
1946 for (uint16_t i
= 0; i
<= uid_resp_bits
/8; i
++) {
1947 sel_uid
[2+i
] = uid_resp
[i
];
1949 collision_answer_offset
= uid_resp_bits
%8;
1950 ReaderTransmitBits(sel_uid
, 16 + uid_resp_bits
, NULL
);
1951 if (!ReaderReceiveOffset(resp
, collision_answer_offset
, resp_par
)) return 0;
1953 // finally, add the last bits and BCC of the UID
1954 for (uint16_t i
= collision_answer_offset
; i
< (Demod
.len
-1)*8; i
++, uid_resp_bits
++) {
1955 uint16_t UIDbit
= (resp
[i
/8] >> (i
%8)) & 0x01;
1956 uid_resp
[uid_resp_bits
/8] |= UIDbit
<< (uid_resp_bits
% 8);
1959 } else { // no collision, use the response to SELECT_ALL as current uid
1960 memcpy(uid_resp
, resp
, 4);
1963 if (cascade_level
< num_cascades
- 1) {
1965 memcpy(uid_resp
+1, uid_ptr
+cascade_level
*3, 3);
1967 memcpy(uid_resp
, uid_ptr
+cascade_level
*3, 4);
1972 // calculate crypto UID. Always use last 4 Bytes.
1974 *cuid_ptr
= bytes_to_num(uid_resp
, 4);
1977 // Construct SELECT UID command
1978 sel_uid
[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC)
1979 memcpy(sel_uid
+2, uid_resp
, 4); // the UID received during anticollision, or the provided UID
1980 sel_uid
[6] = sel_uid
[2] ^ sel_uid
[3] ^ sel_uid
[4] ^ sel_uid
[5]; // calculate and add BCC
1981 AppendCrc14443a(sel_uid
, 7); // calculate and add CRC
1982 ReaderTransmit(sel_uid
, sizeof(sel_uid
), NULL
);
1985 if (!ReaderReceive(resp
, resp_par
)) return 0;
1988 // Test if more parts of the uid are coming
1989 if ((sak
& 0x04) /* && uid_resp[0] == 0x88 */) {
1990 // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of:
1991 // http://www.nxp.com/documents/application_note/AN10927.pdf
1992 uid_resp
[0] = uid_resp
[1];
1993 uid_resp
[1] = uid_resp
[2];
1994 uid_resp
[2] = uid_resp
[3];
1998 if(uid_ptr
&& anticollision
) {
1999 memcpy(uid_ptr
+ (cascade_level
*3), uid_resp
, uid_resp_len
);
2003 memcpy(p_hi14a_card
->uid
+ (cascade_level
*3), uid_resp
, uid_resp_len
);
2004 p_hi14a_card
->uidlen
+= uid_resp_len
;
2009 p_hi14a_card
->sak
= sak
;
2010 p_hi14a_card
->ats_len
= 0;
2013 // non iso14443a compliant tag
2014 if( (sak
& 0x20) == 0) return 2;
2016 // Request for answer to select
2017 AppendCrc14443a(rats
, 2);
2018 ReaderTransmit(rats
, sizeof(rats
), NULL
);
2020 if (!(len
= ReaderReceive(resp
, resp_par
))) return 0;
2024 memcpy(p_hi14a_card
->ats
, resp
, sizeof(p_hi14a_card
->ats
));
2025 p_hi14a_card
->ats_len
= len
;
2028 // reset the PCB block number
2029 iso14_pcb_blocknum
= 0;
2031 // set default timeout based on ATS
2032 iso14a_set_ATS_timeout(resp
);
2037 void iso14443a_setup(uint8_t fpga_minor_mode
) {
2038 FpgaDownloadAndGo(FPGA_BITSTREAM_HF
);
2039 // Set up the synchronous serial port
2041 // connect Demodulated Signal to ADC:
2042 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
2044 // Signal field is on with the appropriate LED
2045 if (fpga_minor_mode
== FPGA_HF_ISO14443A_READER_MOD
2046 || fpga_minor_mode
== FPGA_HF_ISO14443A_READER_LISTEN
) {
2051 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| fpga_minor_mode
);
2058 NextTransferTime
= 2*DELAY_ARM2AIR_AS_READER
;
2059 iso14a_set_timeout(10*106); // 10ms default
2062 int iso14_apdu(uint8_t *cmd
, uint16_t cmd_len
, void *data
) {
2063 uint8_t parity
[MAX_PARITY_SIZE
];
2064 uint8_t real_cmd
[cmd_len
+4];
2065 real_cmd
[0] = 0x0a; //I-Block
2066 // put block number into the PCB
2067 real_cmd
[0] |= iso14_pcb_blocknum
;
2068 real_cmd
[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards
2069 memcpy(real_cmd
+2, cmd
, cmd_len
);
2070 AppendCrc14443a(real_cmd
,cmd_len
+2);
2072 ReaderTransmit(real_cmd
, cmd_len
+4, NULL
);
2073 size_t len
= ReaderReceive(data
, parity
);
2074 uint8_t *data_bytes
= (uint8_t *) data
;
2076 return 0; //DATA LINK ERROR
2077 // if we received an I- or R(ACK)-Block with a block number equal to the
2078 // current block number, toggle the current block number
2079 else if (len
>= 4 // PCB+CID+CRC = 4 bytes
2080 && ((data_bytes
[0] & 0xC0) == 0 // I-Block
2081 || (data_bytes
[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0
2082 && (data_bytes
[0] & 0x01) == iso14_pcb_blocknum
) // equal block numbers
2084 iso14_pcb_blocknum
^= 1;
2090 //-----------------------------------------------------------------------------
2091 // Read an ISO 14443a tag. Send out commands and store answers.
2093 //-----------------------------------------------------------------------------
2094 void ReaderIso14443a(UsbCommand
*c
)
2096 iso14a_command_t param
= c
->arg
[0];
2097 uint8_t *cmd
= c
->d
.asBytes
;
2098 size_t len
= c
->arg
[1] & 0xffff;
2099 size_t lenbits
= c
->arg
[1] >> 16;
2100 uint32_t timeout
= c
->arg
[2];
2102 byte_t buf
[USB_CMD_DATA_SIZE
];
2103 uint8_t par
[MAX_PARITY_SIZE
];
2105 if(param
& ISO14A_CONNECT
) {
2111 if(param
& ISO14A_REQUEST_TRIGGER
) {
2112 iso14a_set_trigger(TRUE
);
2115 if(param
& ISO14A_CONNECT
) {
2116 iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN
);
2117 if(!(param
& ISO14A_NO_SELECT
)) {
2118 iso14a_card_select_t
*card
= (iso14a_card_select_t
*)buf
;
2119 arg0
= iso14443a_select_card(NULL
,card
,NULL
, true, 0);
2120 cmd_send(CMD_ACK
,arg0
,card
->uidlen
,0,buf
,sizeof(iso14a_card_select_t
));
2124 if(param
& ISO14A_SET_TIMEOUT
) {
2125 iso14a_set_timeout(timeout
);
2128 if(param
& ISO14A_APDU
) {
2129 arg0
= iso14_apdu(cmd
, len
, buf
);
2130 cmd_send(CMD_ACK
,arg0
,0,0,buf
,sizeof(buf
));
2133 if(param
& ISO14A_RAW
) {
2134 if(param
& ISO14A_APPEND_CRC
) {
2135 if(param
& ISO14A_TOPAZMODE
) {
2136 AppendCrc14443b(cmd
,len
);
2138 AppendCrc14443a(cmd
,len
);
2141 if (lenbits
) lenbits
+= 16;
2143 if(lenbits
>0) { // want to send a specific number of bits (e.g. short commands)
2144 if(param
& ISO14A_TOPAZMODE
) {
2145 int bits_to_send
= lenbits
;
2147 ReaderTransmitBitsPar(&cmd
[i
++], MIN(bits_to_send
, 7), NULL
, NULL
); // first byte is always short (7bits) and no parity
2149 while (bits_to_send
> 0) {
2150 ReaderTransmitBitsPar(&cmd
[i
++], MIN(bits_to_send
, 8), NULL
, NULL
); // following bytes are 8 bit and no parity
2154 GetParity(cmd
, lenbits
/8, par
);
2155 ReaderTransmitBitsPar(cmd
, lenbits
, par
, NULL
); // bytes are 8 bit with odd parity
2157 } else { // want to send complete bytes only
2158 if(param
& ISO14A_TOPAZMODE
) {
2160 ReaderTransmitBitsPar(&cmd
[i
++], 7, NULL
, NULL
); // first byte: 7 bits, no paritiy
2162 ReaderTransmitBitsPar(&cmd
[i
++], 8, NULL
, NULL
); // following bytes: 8 bits, no paritiy
2165 ReaderTransmit(cmd
,len
, NULL
); // 8 bits, odd parity
2168 arg0
= ReaderReceive(buf
, par
);
2169 cmd_send(CMD_ACK
,arg0
,0,0,buf
,sizeof(buf
));
2172 if(param
& ISO14A_REQUEST_TRIGGER
) {
2173 iso14a_set_trigger(FALSE
);
2176 if(param
& ISO14A_NO_DISCONNECT
) {
2180 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
2186 // Determine the distance between two nonces.
2187 // Assume that the difference is small, but we don't know which is first.
2188 // Therefore try in alternating directions.
2189 int32_t dist_nt(uint32_t nt1
, uint32_t nt2
) {
2192 uint32_t nttmp1
, nttmp2
;
2194 if (nt1
== nt2
) return 0;
2199 for (i
= 1; i
< 0xFFFF; i
++) {
2200 nttmp1
= prng_successor(nttmp1
, 1);
2201 if (nttmp1
== nt2
) return i
;
2202 nttmp2
= prng_successor(nttmp2
, 1);
2203 if (nttmp2
== nt1
) return -i
;
2206 return(-99999); // either nt1 or nt2 are invalid nonces
2210 //-----------------------------------------------------------------------------
2211 // Recover several bits of the cypher stream. This implements (first stages of)
2212 // the algorithm described in "The Dark Side of Security by Obscurity and
2213 // Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime"
2214 // (article by Nicolas T. Courtois, 2009)
2215 //-----------------------------------------------------------------------------
2216 void ReaderMifare(bool first_try
)
2219 uint8_t mf_auth
[] = { 0x60,0x00,0xf5,0x7b };
2220 uint8_t mf_nr_ar
[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
2221 static uint8_t mf_nr_ar3
;
2223 uint8_t receivedAnswer
[MAX_MIFARE_FRAME_SIZE
];
2224 uint8_t receivedAnswerPar
[MAX_MIFARE_PARITY_SIZE
];
2227 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD
);
2230 // free eventually allocated BigBuf memory. We want all for tracing.
2237 uint8_t par
[1] = {0}; // maximum 8 Bytes to be sent here, 1 byte parity is therefore enough
2238 static byte_t par_low
= 0;
2240 uint8_t uid
[10] ={0};
2244 uint32_t previous_nt
= 0;
2245 static uint32_t nt_attacked
= 0;
2246 byte_t par_list
[8] = {0x00};
2247 byte_t ks_list
[8] = {0x00};
2249 #define PRNG_SEQUENCE_LENGTH (1 << 16);
2250 static uint32_t sync_time
= 0;
2251 static int32_t sync_cycles
= 0;
2252 int catch_up_cycles
= 0;
2253 int last_catch_up
= 0;
2254 uint16_t elapsed_prng_sequences
;
2255 uint16_t consecutive_resyncs
= 0;
2260 sync_time
= GetCountSspClk() & 0xfffffff8;
2261 sync_cycles
= PRNG_SEQUENCE_LENGTH
; //65536; //0x10000 // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces).
2266 // we were unsuccessful on a previous call. Try another READER nonce (first 3 parity bits remain the same)
2268 mf_nr_ar
[3] = mf_nr_ar3
;
2277 #define MAX_UNEXPECTED_RANDOM 4 // maximum number of unexpected (i.e. real) random numbers when trying to sync. Then give up.
2278 #define MAX_SYNC_TRIES 32
2279 #define NUM_DEBUG_INFOS 8 // per strategy
2280 #define MAX_STRATEGY 3
2281 uint16_t unexpected_random
= 0;
2282 uint16_t sync_tries
= 0;
2283 int16_t debug_info_nr
= -1;
2284 uint16_t strategy
= 0;
2285 int32_t debug_info
[MAX_STRATEGY
][NUM_DEBUG_INFOS
];
2286 uint32_t select_time
;
2289 for(uint16_t i
= 0; TRUE
; i
++) {
2294 // Test if the action was cancelled
2295 if(BUTTON_PRESS()) {
2300 if (strategy
== 2) {
2301 // test with additional hlt command
2303 int len
= mifare_sendcmd_short(NULL
, false, 0x50, 0x00, receivedAnswer
, receivedAnswerPar
, &halt_time
);
2304 if (len
&& MF_DBGLEVEL
>= 3) {
2305 Dbprintf("Unexpected response of %d bytes to hlt command (additional debugging).", len
);
2309 if (strategy
== 3) {
2310 // test with FPGA power off/on
2311 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
2313 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD
);
2317 if(!iso14443a_select_card(uid
, NULL
, &cuid
, true, 0)) {
2318 if (MF_DBGLEVEL
>= 1) Dbprintf("Mifare: Can't select card");
2321 select_time
= GetCountSspClk();
2323 elapsed_prng_sequences
= 1;
2324 if (debug_info_nr
== -1) {
2325 sync_time
= (sync_time
& 0xfffffff8) + sync_cycles
+ catch_up_cycles
;
2326 catch_up_cycles
= 0;
2328 // if we missed the sync time already, advance to the next nonce repeat
2329 while(GetCountSspClk() > sync_time
) {
2330 elapsed_prng_sequences
++;
2331 sync_time
= (sync_time
& 0xfffffff8) + sync_cycles
;
2334 // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked)
2335 ReaderTransmit(mf_auth
, sizeof(mf_auth
), &sync_time
);
2337 // collect some information on tag nonces for debugging:
2338 #define DEBUG_FIXED_SYNC_CYCLES PRNG_SEQUENCE_LENGTH
2339 if (strategy
== 0) {
2340 // nonce distances at fixed time after card select:
2341 sync_time
= select_time
+ DEBUG_FIXED_SYNC_CYCLES
;
2342 } else if (strategy
== 1) {
2343 // nonce distances at fixed time between authentications:
2344 sync_time
= sync_time
+ DEBUG_FIXED_SYNC_CYCLES
;
2345 } else if (strategy
== 2) {
2346 // nonce distances at fixed time after halt:
2347 sync_time
= halt_time
+ DEBUG_FIXED_SYNC_CYCLES
;
2349 // nonce_distances at fixed time after power on
2350 sync_time
= DEBUG_FIXED_SYNC_CYCLES
;
2352 ReaderTransmit(mf_auth
, sizeof(mf_auth
), &sync_time
);
2355 // Receive the (4 Byte) "random" nonce
2356 if (!ReaderReceive(receivedAnswer
, receivedAnswerPar
)) {
2357 if (MF_DBGLEVEL
>= 1) Dbprintf("Mifare: Couldn't receive tag nonce");
2362 nt
= bytes_to_num(receivedAnswer
, 4);
2364 // Transmit reader nonce with fake par
2365 ReaderTransmitPar(mf_nr_ar
, sizeof(mf_nr_ar
), par
, NULL
);
2367 if (first_try
&& previous_nt
&& !nt_attacked
) { // we didn't calibrate our clock yet
2368 int nt_distance
= dist_nt(previous_nt
, nt
);
2369 if (nt_distance
== 0) {
2372 if (nt_distance
== -99999) { // invalid nonce received
2373 unexpected_random
++;
2374 if (unexpected_random
> MAX_UNEXPECTED_RANDOM
) {
2375 isOK
= -3; // Card has an unpredictable PRNG. Give up
2378 continue; // continue trying...
2381 if (++sync_tries
> MAX_SYNC_TRIES
) {
2382 if (strategy
> MAX_STRATEGY
|| MF_DBGLEVEL
< 3) {
2383 isOK
= -4; // Card's PRNG runs at an unexpected frequency or resets unexpectedly
2385 } else { // continue for a while, just to collect some debug info
2386 debug_info
[strategy
][debug_info_nr
] = nt_distance
;
2388 if (debug_info_nr
== NUM_DEBUG_INFOS
) {
2395 sync_cycles
= (sync_cycles
- nt_distance
/elapsed_prng_sequences
);
2396 if (sync_cycles
<= 0) {
2397 sync_cycles
+= PRNG_SEQUENCE_LENGTH
;
2399 if (MF_DBGLEVEL
>= 3) {
2400 Dbprintf("calibrating in cycle %d. nt_distance=%d, elapsed_prng_sequences=%d, new sync_cycles: %d\n", i
, nt_distance
, elapsed_prng_sequences
, sync_cycles
);
2406 if ((nt
!= nt_attacked
) && nt_attacked
) { // we somehow lost sync. Try to catch up again...
2407 catch_up_cycles
= -dist_nt(nt_attacked
, nt
);
2408 if (catch_up_cycles
== 99999) { // invalid nonce received. Don't resync on that one.
2409 catch_up_cycles
= 0;
2412 catch_up_cycles
/= elapsed_prng_sequences
;
2413 if (catch_up_cycles
== last_catch_up
) {
2414 consecutive_resyncs
++;
2417 last_catch_up
= catch_up_cycles
;
2418 consecutive_resyncs
= 0;
2420 if (consecutive_resyncs
< 3) {
2421 if (MF_DBGLEVEL
>= 3) Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i
, -catch_up_cycles
, consecutive_resyncs
);
2424 sync_cycles
= sync_cycles
+ catch_up_cycles
;
2425 if (MF_DBGLEVEL
>= 3) Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i
, -catch_up_cycles
, sync_cycles
);
2427 catch_up_cycles
= 0;
2428 consecutive_resyncs
= 0;
2433 consecutive_resyncs
= 0;
2435 // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding
2436 if (ReaderReceive(receivedAnswer
, receivedAnswerPar
)) {
2437 catch_up_cycles
= 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer
2440 par_low
= par
[0] & 0xE0; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change
2444 if(led_on
) LED_B_ON(); else LED_B_OFF();
2446 par_list
[nt_diff
] = SwapBits(par
[0], 8);
2447 ks_list
[nt_diff
] = receivedAnswer
[0] ^ 0x05;
2449 // Test if the information is complete
2450 if (nt_diff
== 0x07) {
2455 nt_diff
= (nt_diff
+ 1) & 0x07;
2456 mf_nr_ar
[3] = (mf_nr_ar
[3] & 0x1F) | (nt_diff
<< 5);
2459 if (nt_diff
== 0 && first_try
)
2462 if (par
[0] == 0x00) { // tried all 256 possible parities without success. Card doesn't send NACK.
2467 par
[0] = ((par
[0] & 0x1F) + 1) | par_low
;
2473 mf_nr_ar
[3] &= 0x1F;
2476 if (MF_DBGLEVEL
>= 3) {
2477 for (uint16_t i
= 0; i
<= MAX_STRATEGY
; i
++) {
2478 for(uint16_t j
= 0; j
< NUM_DEBUG_INFOS
; j
++) {
2479 Dbprintf("collected debug info[%d][%d] = %d", i
, j
, debug_info
[i
][j
]);
2486 memcpy(buf
+ 0, uid
, 4);
2487 num_to_bytes(nt
, 4, buf
+ 4);
2488 memcpy(buf
+ 8, par_list
, 8);
2489 memcpy(buf
+ 16, ks_list
, 8);
2490 memcpy(buf
+ 24, mf_nr_ar
, 4);
2492 cmd_send(CMD_ACK
,isOK
,0,0,buf
,28);
2495 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
2502 *MIFARE 1K simulate.
2505 * FLAG_INTERACTIVE - In interactive mode, we are expected to finish the operation with an ACK
2506 * 4B_FLAG_UID_IN_DATA - means that there is a 4-byte UID in the data-section, we're expected to use that
2507 * 7B_FLAG_UID_IN_DATA - means that there is a 7-byte UID in the data-section, we're expected to use that
2508 * FLAG_NR_AR_ATTACK - means we should collect NR_AR responses for bruteforcing later
2509 *@param exitAfterNReads, exit simulation after n blocks have been read, 0 is inifite
2511 void Mifare1ksim(uint8_t flags
, uint8_t exitAfterNReads
, uint8_t arg2
, uint8_t *datain
)
2513 int cardSTATE
= MFEMUL_NOFIELD
;
2515 int vHf
= 0; // in mV
2517 uint32_t selTimer
= 0;
2518 uint32_t authTimer
= 0;
2520 uint8_t cardWRBL
= 0;
2521 uint8_t cardAUTHSC
= 0;
2522 uint8_t cardAUTHKEY
= 0xff; // no authentication
2523 // uint32_t cardRr = 0;
2525 //uint32_t rn_enc = 0;
2527 uint32_t cardINTREG
= 0;
2528 uint8_t cardINTBLOCK
= 0;
2529 struct Crypto1State mpcs
= {0, 0};
2530 struct Crypto1State
*pcs
;
2532 uint32_t numReads
= 0;//Counts numer of times reader read a block
2533 uint8_t receivedCmd
[MAX_MIFARE_FRAME_SIZE
];
2534 uint8_t receivedCmd_par
[MAX_MIFARE_PARITY_SIZE
];
2535 uint8_t response
[MAX_MIFARE_FRAME_SIZE
];
2536 uint8_t response_par
[MAX_MIFARE_PARITY_SIZE
];
2538 uint8_t rATQA
[] = {0x04, 0x00}; // Mifare classic 1k 4BUID
2539 uint8_t rUIDBCC1
[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2540 uint8_t rUIDBCC2
[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; // !!!
2541 uint8_t rSAK
[] = {0x08, 0xb6, 0xdd}; // Mifare Classic
2542 //uint8_t rSAK[] = {0x09, 0x3f, 0xcc }; // Mifare Mini
2543 uint8_t rSAK1
[] = {0x04, 0xda, 0x17};
2545 uint8_t rAUTH_NT
[] = {0x01, 0x01, 0x01, 0x01};
2546 uint8_t rAUTH_AT
[] = {0x00, 0x00, 0x00, 0x00};
2548 //Here, we collect UID,NT,AR,NR,UID2,NT2,AR2,NR2
2549 // This can be used in a reader-only attack.
2550 // (it can also be retrieved via 'hf 14a list', but hey...
2551 uint32_t ar_nr_responses
[] = {0,0,0,0,0,0,0,0,0,0};
2552 uint8_t ar_nr_collected
= 0;
2554 // Authenticate response - nonce
2555 uint32_t nonce
= bytes_to_num(rAUTH_NT
, 4);
2557 //-- Determine the UID
2558 // Can be set from emulator memory, incoming data
2559 // and can be 7 or 4 bytes long
2560 if (flags
& FLAG_4B_UID_IN_DATA
)
2562 // 4B uid comes from data-portion of packet
2563 memcpy(rUIDBCC1
,datain
,4);
2564 rUIDBCC1
[4] = rUIDBCC1
[0] ^ rUIDBCC1
[1] ^ rUIDBCC1
[2] ^ rUIDBCC1
[3];
2566 } else if (flags
& FLAG_7B_UID_IN_DATA
) {
2567 // 7B uid comes from data-portion of packet
2568 memcpy(&rUIDBCC1
[1],datain
,3);
2569 memcpy(rUIDBCC2
, datain
+3, 4);
2572 // get UID from emul memory
2573 emlGetMemBt(receivedCmd
, 7, 1);
2574 _7BUID
= !(receivedCmd
[0] == 0x00);
2575 if (!_7BUID
) { // ---------- 4BUID
2576 emlGetMemBt(rUIDBCC1
, 0, 4);
2577 } else { // ---------- 7BUID
2578 emlGetMemBt(&rUIDBCC1
[1], 0, 3);
2579 emlGetMemBt(rUIDBCC2
, 3, 4);
2584 ar_nr_responses
[0*5] = bytes_to_num(rUIDBCC1
+1, 3);
2586 ar_nr_responses
[0*5+1] = bytes_to_num(rUIDBCC2
, 4);
2589 * Regardless of what method was used to set the UID, set fifth byte and modify
2590 * the ATQA for 4 or 7-byte UID
2592 rUIDBCC1
[4] = rUIDBCC1
[0] ^ rUIDBCC1
[1] ^ rUIDBCC1
[2] ^ rUIDBCC1
[3];
2596 rUIDBCC1
[4] = rUIDBCC1
[0] ^ rUIDBCC1
[1] ^ rUIDBCC1
[2] ^ rUIDBCC1
[3];
2597 rUIDBCC2
[4] = rUIDBCC2
[0] ^ rUIDBCC2
[1] ^ rUIDBCC2
[2] ^ rUIDBCC2
[3];
2600 if (MF_DBGLEVEL
>= 1) {
2602 Dbprintf("4B UID: %02x%02x%02x%02x",
2603 rUIDBCC1
[0], rUIDBCC1
[1], rUIDBCC1
[2], rUIDBCC1
[3]);
2605 Dbprintf("7B UID: (%02x)%02x%02x%02x%02x%02x%02x%02x",
2606 rUIDBCC1
[0], rUIDBCC1
[1], rUIDBCC1
[2], rUIDBCC1
[3],
2607 rUIDBCC2
[0], rUIDBCC2
[1] ,rUIDBCC2
[2], rUIDBCC2
[3]);
2611 // We need to listen to the high-frequency, peak-detected path.
2612 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
2614 // free eventually allocated BigBuf memory but keep Emulator Memory
2615 BigBuf_free_keep_EM();
2622 bool finished
= FALSE
;
2623 while (!BUTTON_PRESS() && !finished
) {
2626 // find reader field
2627 if (cardSTATE
== MFEMUL_NOFIELD
) {
2628 vHf
= (MAX_ADC_HF_VOLTAGE
* AvgAdc(ADC_CHAN_HF
)) >> 10;
2629 if (vHf
> MF_MINFIELDV
) {
2630 cardSTATE_TO_IDLE();
2634 if(cardSTATE
== MFEMUL_NOFIELD
) continue;
2637 res
= EmGetCmd(receivedCmd
, &len
, receivedCmd_par
);
2638 if (res
== 2) { //Field is off!
2639 cardSTATE
= MFEMUL_NOFIELD
;
2642 } else if (res
== 1) {
2643 break; //return value 1 means button press
2646 // REQ or WUP request in ANY state and WUP in HALTED state
2647 if (len
== 1 && ((receivedCmd
[0] == 0x26 && cardSTATE
!= MFEMUL_HALTED
) || receivedCmd
[0] == 0x52)) {
2648 selTimer
= GetTickCount();
2649 EmSendCmdEx(rATQA
, sizeof(rATQA
), (receivedCmd
[0] == 0x52));
2650 cardSTATE
= MFEMUL_SELECT1
;
2652 // init crypto block
2655 crypto1_destroy(pcs
);
2660 switch (cardSTATE
) {
2661 case MFEMUL_NOFIELD
:
2664 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2667 case MFEMUL_SELECT1
:{
2669 if (len
== 2 && (receivedCmd
[0] == 0x93 && receivedCmd
[1] == 0x20)) {
2670 if (MF_DBGLEVEL
>= 4) Dbprintf("SELECT ALL received");
2671 EmSendCmd(rUIDBCC1
, sizeof(rUIDBCC1
));
2675 if (MF_DBGLEVEL
>= 4 && len
== 9 && receivedCmd
[0] == 0x93 && receivedCmd
[1] == 0x70 )
2677 Dbprintf("SELECT %02x%02x%02x%02x received",receivedCmd
[2],receivedCmd
[3],receivedCmd
[4],receivedCmd
[5]);
2681 (receivedCmd
[0] == 0x93 && receivedCmd
[1] == 0x70 && memcmp(&receivedCmd
[2], rUIDBCC1
, 4) == 0)) {
2682 EmSendCmd(_7BUID
?rSAK1
:rSAK
, _7BUID
?sizeof(rSAK1
):sizeof(rSAK
));
2683 cuid
= bytes_to_num(rUIDBCC1
, 4);
2685 cardSTATE
= MFEMUL_WORK
;
2687 if (MF_DBGLEVEL
>= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer
);
2690 cardSTATE
= MFEMUL_SELECT2
;
2698 cardSTATE_TO_IDLE();
2699 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2703 uint32_t ar
= bytes_to_num(receivedCmd
, 4);
2704 uint32_t nr
= bytes_to_num(&receivedCmd
[4], 4);
2707 //if(ar_nr_collected < 2 && cardAUTHSC == 2){
2708 if(ar_nr_collected
< 2){
2709 if(ar_nr_responses
[2] != ar
)
2710 {// Avoid duplicates... probably not necessary, ar should vary.
2711 //ar_nr_responses[ar_nr_collected*5] = 0;
2712 //ar_nr_responses[ar_nr_collected*5+1] = 0;
2713 ar_nr_responses
[ar_nr_collected
*5+2] = nonce
;
2714 ar_nr_responses
[ar_nr_collected
*5+3] = nr
;
2715 ar_nr_responses
[ar_nr_collected
*5+4] = ar
;
2718 // Interactive mode flag, means we need to send ACK
2719 if(flags
& FLAG_INTERACTIVE
&& ar_nr_collected
== 2)
2726 //crypto1_word(pcs, ar , 1);
2727 //cardRr = nr ^ crypto1_word(pcs, 0, 0);
2730 //if (cardRr != prng_successor(nonce, 64)){
2732 //if (MF_DBGLEVEL >= 4) Dbprintf("AUTH FAILED for sector %d with key %c. cardRr=%08x, succ=%08x",
2733 // cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B',
2734 // cardRr, prng_successor(nonce, 64));
2735 // Shouldn't we respond anything here?
2736 // Right now, we don't nack or anything, which causes the
2737 // reader to do a WUPA after a while. /Martin
2738 // -- which is the correct response. /piwi
2739 //cardSTATE_TO_IDLE();
2740 //LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2744 ans
= prng_successor(nonce
, 96) ^ crypto1_word(pcs
, 0, 0);
2746 num_to_bytes(ans
, 4, rAUTH_AT
);
2748 EmSendCmd(rAUTH_AT
, sizeof(rAUTH_AT
));
2750 cardSTATE
= MFEMUL_WORK
;
2751 if (MF_DBGLEVEL
>= 4) Dbprintf("AUTH COMPLETED for sector %d with key %c. time=%d",
2752 cardAUTHSC
, cardAUTHKEY
== 0 ? 'A' : 'B',
2753 GetTickCount() - authTimer
);
2756 case MFEMUL_SELECT2
:{
2758 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2761 if (len
== 2 && (receivedCmd
[0] == 0x95 && receivedCmd
[1] == 0x20)) {
2762 EmSendCmd(rUIDBCC2
, sizeof(rUIDBCC2
));
2768 (receivedCmd
[0] == 0x95 && receivedCmd
[1] == 0x70 && memcmp(&receivedCmd
[2], rUIDBCC2
, 4) == 0)) {
2769 EmSendCmd(rSAK
, sizeof(rSAK
));
2770 cuid
= bytes_to_num(rUIDBCC2
, 4);
2771 cardSTATE
= MFEMUL_WORK
;
2773 if (MF_DBGLEVEL
>= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer
);
2777 // i guess there is a command). go into the work state.
2779 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2782 cardSTATE
= MFEMUL_WORK
;
2784 //intentional fall-through to the next case-stmt
2789 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2793 bool encrypted_data
= (cardAUTHKEY
!= 0xFF) ;
2795 if(encrypted_data
) {
2797 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2800 if (len
== 4 && (receivedCmd
[0] == 0x60 || receivedCmd
[0] == 0x61)) {
2801 authTimer
= GetTickCount();
2802 cardAUTHSC
= receivedCmd
[1] / 4; // received block num
2803 cardAUTHKEY
= receivedCmd
[0] - 0x60;
2804 crypto1_destroy(pcs
);//Added by martin
2805 crypto1_create(pcs
, emlGetKey(cardAUTHSC
, cardAUTHKEY
));
2807 if (!encrypted_data
) { // first authentication
2808 if (MF_DBGLEVEL
>= 4) Dbprintf("Reader authenticating for block %d (0x%02x) with key %d",receivedCmd
[1] ,receivedCmd
[1],cardAUTHKEY
);
2810 crypto1_word(pcs
, cuid
^ nonce
, 0);//Update crypto state
2811 num_to_bytes(nonce
, 4, rAUTH_AT
); // Send nonce
2812 } else { // nested authentication
2813 if (MF_DBGLEVEL
>= 4) Dbprintf("Reader doing nested authentication for block %d (0x%02x) with key %d",receivedCmd
[1] ,receivedCmd
[1],cardAUTHKEY
);
2814 ans
= nonce
^ crypto1_word(pcs
, cuid
^ nonce
, 0);
2815 num_to_bytes(ans
, 4, rAUTH_AT
);
2818 EmSendCmd(rAUTH_AT
, sizeof(rAUTH_AT
));
2819 //Dbprintf("Sending rAUTH %02x%02x%02x%02x", rAUTH_AT[0],rAUTH_AT[1],rAUTH_AT[2],rAUTH_AT[3]);
2820 cardSTATE
= MFEMUL_AUTH1
;
2824 // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued
2825 // BUT... ACK --> NACK
2826 if (len
== 1 && receivedCmd
[0] == CARD_ACK
) {
2827 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2831 // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK)
2832 if (len
== 1 && receivedCmd
[0] == CARD_NACK_NA
) {
2833 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2838 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2842 if(receivedCmd
[0] == 0x30 // read block
2843 || receivedCmd
[0] == 0xA0 // write block
2844 || receivedCmd
[0] == 0xC0 // inc
2845 || receivedCmd
[0] == 0xC1 // dec
2846 || receivedCmd
[0] == 0xC2 // restore
2847 || receivedCmd
[0] == 0xB0) { // transfer
2848 if (receivedCmd
[1] >= 16 * 4) {
2849 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2850 if (MF_DBGLEVEL
>= 4) Dbprintf("Reader tried to operate (0x%02) on out of range block: %d (0x%02x), nacking",receivedCmd
[0],receivedCmd
[1],receivedCmd
[1]);
2854 if (receivedCmd
[1] / 4 != cardAUTHSC
) {
2855 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2856 if (MF_DBGLEVEL
>= 4) Dbprintf("Reader tried to operate (0x%02) on block (0x%02x) not authenticated for (0x%02x), nacking",receivedCmd
[0],receivedCmd
[1],cardAUTHSC
);
2861 if (receivedCmd
[0] == 0x30) {
2862 if (MF_DBGLEVEL
>= 4) {
2863 Dbprintf("Reader reading block %d (0x%02x)",receivedCmd
[1],receivedCmd
[1]);
2865 emlGetMem(response
, receivedCmd
[1], 1);
2866 AppendCrc14443a(response
, 16);
2867 mf_crypto1_encrypt(pcs
, response
, 18, response_par
);
2868 EmSendCmdPar(response
, 18, response_par
);
2870 if(exitAfterNReads
> 0 && numReads
>= exitAfterNReads
) {
2871 Dbprintf("%d reads done, exiting", numReads
);
2877 if (receivedCmd
[0] == 0xA0) {
2878 if (MF_DBGLEVEL
>= 4) Dbprintf("RECV 0xA0 write block %d (%02x)",receivedCmd
[1],receivedCmd
[1]);
2879 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2880 cardSTATE
= MFEMUL_WRITEBL2
;
2881 cardWRBL
= receivedCmd
[1];
2884 // increment, decrement, restore
2885 if (receivedCmd
[0] == 0xC0 || receivedCmd
[0] == 0xC1 || receivedCmd
[0] == 0xC2) {
2886 if (MF_DBGLEVEL
>= 4) Dbprintf("RECV 0x%02x inc(0xC1)/dec(0xC0)/restore(0xC2) block %d (%02x)",receivedCmd
[0],receivedCmd
[1],receivedCmd
[1]);
2887 if (emlCheckValBl(receivedCmd
[1])) {
2888 if (MF_DBGLEVEL
>= 4) Dbprintf("Reader tried to operate on block, but emlCheckValBl failed, nacking");
2889 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2892 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2893 if (receivedCmd
[0] == 0xC1)
2894 cardSTATE
= MFEMUL_INTREG_INC
;
2895 if (receivedCmd
[0] == 0xC0)
2896 cardSTATE
= MFEMUL_INTREG_DEC
;
2897 if (receivedCmd
[0] == 0xC2)
2898 cardSTATE
= MFEMUL_INTREG_REST
;
2899 cardWRBL
= receivedCmd
[1];
2903 if (receivedCmd
[0] == 0xB0) {
2904 if (MF_DBGLEVEL
>= 4) Dbprintf("RECV 0x%02x transfer block %d (%02x)",receivedCmd
[0],receivedCmd
[1],receivedCmd
[1]);
2905 if (emlSetValBl(cardINTREG
, cardINTBLOCK
, receivedCmd
[1]))
2906 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2908 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2912 if (receivedCmd
[0] == 0x50 && receivedCmd
[1] == 0x00) {
2915 cardSTATE
= MFEMUL_HALTED
;
2916 if (MF_DBGLEVEL
>= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer
);
2917 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2921 if (receivedCmd
[0] == 0xe0) {//RATS
2922 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2925 // command not allowed
2926 if (MF_DBGLEVEL
>= 4) Dbprintf("Received command not allowed, nacking");
2927 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2930 case MFEMUL_WRITEBL2
:{
2932 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2933 emlSetMem(receivedCmd
, cardWRBL
, 1);
2934 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2935 cardSTATE
= MFEMUL_WORK
;
2937 cardSTATE_TO_IDLE();
2938 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2943 case MFEMUL_INTREG_INC
:{
2944 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2945 memcpy(&ans
, receivedCmd
, 4);
2946 if (emlGetValBl(&cardINTREG
, &cardINTBLOCK
, cardWRBL
)) {
2947 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2948 cardSTATE_TO_IDLE();
2951 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2952 cardINTREG
= cardINTREG
+ ans
;
2953 cardSTATE
= MFEMUL_WORK
;
2956 case MFEMUL_INTREG_DEC
:{
2957 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2958 memcpy(&ans
, receivedCmd
, 4);
2959 if (emlGetValBl(&cardINTREG
, &cardINTBLOCK
, cardWRBL
)) {
2960 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2961 cardSTATE_TO_IDLE();
2964 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2965 cardINTREG
= cardINTREG
- ans
;
2966 cardSTATE
= MFEMUL_WORK
;
2969 case MFEMUL_INTREG_REST
:{
2970 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2971 memcpy(&ans
, receivedCmd
, 4);
2972 if (emlGetValBl(&cardINTREG
, &cardINTBLOCK
, cardWRBL
)) {
2973 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2974 cardSTATE_TO_IDLE();
2977 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2978 cardSTATE
= MFEMUL_WORK
;
2984 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
2987 if(flags
& FLAG_INTERACTIVE
)// Interactive mode flag, means we need to send ACK
2989 //May just aswell send the collected ar_nr in the response aswell
2990 uint8_t len
= ar_nr_collected
*5*4;
2991 cmd_send(CMD_ACK
, CMD_SIMULATE_MIFARE_CARD
, len
, 0, &ar_nr_responses
, len
);
2994 if(flags
& FLAG_NR_AR_ATTACK
&& MF_DBGLEVEL
>= 1 )
2996 if(ar_nr_collected
> 1 ) {
2997 Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
2998 Dbprintf("../tools/mfkey/mfkey32 %06x%08x %08x %08x %08x %08x %08x",
2999 ar_nr_responses
[0], // UID1
3000 ar_nr_responses
[1], // UID2
3001 ar_nr_responses
[2], // NT
3002 ar_nr_responses
[3], // AR1
3003 ar_nr_responses
[4], // NR1
3004 ar_nr_responses
[8], // AR2
3005 ar_nr_responses
[9] // NR2
3007 Dbprintf("../tools/mfkey/mfkey32v2 %06x%08x %08x %08x %08x %08x %08x %08x",
3008 ar_nr_responses
[0], // UID1
3009 ar_nr_responses
[1], // UID2
3010 ar_nr_responses
[2], // NT1
3011 ar_nr_responses
[3], // AR1
3012 ar_nr_responses
[4], // NR1
3013 ar_nr_responses
[7], // NT2
3014 ar_nr_responses
[8], // AR2
3015 ar_nr_responses
[9] // NR2
3018 Dbprintf("Failed to obtain two AR/NR pairs!");
3019 if(ar_nr_collected
> 0 ) {
3020 Dbprintf("Only got these: UID=%07x%08x, nonce=%08x, AR1=%08x, NR1=%08x",
3021 ar_nr_responses
[0], // UID1
3022 ar_nr_responses
[1], // UID2
3023 ar_nr_responses
[2], // NT
3024 ar_nr_responses
[3], // AR1
3025 ar_nr_responses
[4] // NR1
3030 if (MF_DBGLEVEL
>= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing
, BigBuf_get_traceLen());
3036 //-----------------------------------------------------------------------------
3039 //-----------------------------------------------------------------------------
3040 void RAMFUNC
SniffMifare(uint8_t param
) {
3042 // bit 0 - trigger from first card answer
3043 // bit 1 - trigger from first reader 7-bit request
3045 // C(red) A(yellow) B(green)
3047 // init trace buffer
3051 // The command (reader -> tag) that we're receiving.
3052 // The length of a received command will in most cases be no more than 18 bytes.
3053 // So 32 should be enough!
3054 uint8_t receivedCmd
[MAX_MIFARE_FRAME_SIZE
];
3055 uint8_t receivedCmdPar
[MAX_MIFARE_PARITY_SIZE
];
3056 // The response (tag -> reader) that we're receiving.
3057 uint8_t receivedResponse
[MAX_MIFARE_FRAME_SIZE
];
3058 uint8_t receivedResponsePar
[MAX_MIFARE_PARITY_SIZE
];
3060 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER
);
3062 // free eventually allocated BigBuf memory
3064 // allocate the DMA buffer, used to stream samples from the FPGA
3065 uint8_t *dmaBuf
= BigBuf_malloc(DMA_BUFFER_SIZE
);
3066 uint8_t *data
= dmaBuf
;
3067 uint8_t previous_data
= 0;
3070 bool ReaderIsActive
= FALSE
;
3071 bool TagIsActive
= FALSE
;
3073 // Set up the demodulator for tag -> reader responses.
3074 DemodInit(receivedResponse
, receivedResponsePar
);
3076 // Set up the demodulator for the reader -> tag commands
3077 UartInit(receivedCmd
, receivedCmdPar
);
3079 // Setup for the DMA.
3080 FpgaSetupSscDma((uint8_t *)dmaBuf
, DMA_BUFFER_SIZE
); // set transfer address and number of bytes. Start transfer.
3087 // And now we loop, receiving samples.
3088 for(uint32_t sniffCounter
= 0; TRUE
; ) {
3090 if(BUTTON_PRESS()) {
3091 DbpString("cancelled by button");
3098 if ((sniffCounter
& 0x0000FFFF) == 0) { // from time to time
3099 // check if a transaction is completed (timeout after 2000ms).
3100 // if yes, stop the DMA transfer and send what we have so far to the client
3101 if (MfSniffSend(2000)) {
3102 // Reset everything - we missed some sniffed data anyway while the DMA was stopped
3106 ReaderIsActive
= FALSE
;
3107 TagIsActive
= FALSE
;
3108 FpgaSetupSscDma((uint8_t *)dmaBuf
, DMA_BUFFER_SIZE
); // set transfer address and number of bytes. Start transfer.
3112 int register readBufDataP
= data
- dmaBuf
; // number of bytes we have processed so far
3113 int register dmaBufDataP
= DMA_BUFFER_SIZE
- AT91C_BASE_PDC_SSC
->PDC_RCR
; // number of bytes already transferred
3114 if (readBufDataP
<= dmaBufDataP
){ // we are processing the same block of data which is currently being transferred
3115 dataLen
= dmaBufDataP
- readBufDataP
; // number of bytes still to be processed
3117 dataLen
= DMA_BUFFER_SIZE
- readBufDataP
+ dmaBufDataP
; // number of bytes still to be processed
3119 // test for length of buffer
3120 if(dataLen
> maxDataLen
) { // we are more behind than ever...
3121 maxDataLen
= dataLen
;
3122 if(dataLen
> (9 * DMA_BUFFER_SIZE
/ 10)) {
3123 Dbprintf("blew circular buffer! dataLen=0x%x", dataLen
);
3127 if(dataLen
< 1) continue;
3129 // primary buffer was stopped ( <-- we lost data!
3130 if (!AT91C_BASE_PDC_SSC
->PDC_RCR
) {
3131 AT91C_BASE_PDC_SSC
->PDC_RPR
= (uint32_t) dmaBuf
;
3132 AT91C_BASE_PDC_SSC
->PDC_RCR
= DMA_BUFFER_SIZE
;
3133 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen
); // temporary
3135 // secondary buffer sets as primary, secondary buffer was stopped
3136 if (!AT91C_BASE_PDC_SSC
->PDC_RNCR
) {
3137 AT91C_BASE_PDC_SSC
->PDC_RNPR
= (uint32_t) dmaBuf
;
3138 AT91C_BASE_PDC_SSC
->PDC_RNCR
= DMA_BUFFER_SIZE
;
3143 if (sniffCounter
& 0x01) {
3145 if(!TagIsActive
) { // no need to try decoding tag data if the reader is sending
3146 uint8_t readerdata
= (previous_data
& 0xF0) | (*data
>> 4);
3147 if(MillerDecoding(readerdata
, (sniffCounter
-1)*4)) {
3149 if (MfSniffLogic(receivedCmd
, Uart
.len
, Uart
.parity
, Uart
.bitCount
, TRUE
)) break;
3151 /* And ready to receive another command. */
3152 UartInit(receivedCmd
, receivedCmdPar
);
3154 /* And also reset the demod code */
3157 ReaderIsActive
= (Uart
.state
!= STATE_UNSYNCD
);
3160 if(!ReaderIsActive
) { // no need to try decoding tag data if the reader is sending
3161 uint8_t tagdata
= (previous_data
<< 4) | (*data
& 0x0F);
3162 if(ManchesterDecoding(tagdata
, 0, (sniffCounter
-1)*4)) {
3165 if (MfSniffLogic(receivedResponse
, Demod
.len
, Demod
.parity
, Demod
.bitCount
, FALSE
)) break;
3167 // And ready to receive another response.
3169 // And reset the Miller decoder including its (now outdated) input buffer
3170 UartInit(receivedCmd
, receivedCmdPar
);
3172 TagIsActive
= (Demod
.state
!= DEMOD_UNSYNCD
);
3176 previous_data
= *data
;
3179 if(data
== dmaBuf
+ DMA_BUFFER_SIZE
) {
3185 FpgaDisableSscDma();
3188 Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen
, Uart
.state
, Uart
.len
);