FIX: minor parseing bug when loading dumpkeys.bin file.

[proxmark3-svn] / armsrc / lfops.c

diff --git a/armsrc/lfops.c b/armsrc/lfops.c
index bf743c24a87deca48a68a8cd6813d61dd7eaf2cb..1a7c32245411ff560f937323caf9b93ace96d217 100644 (file)
--- a/armsrc/lfops.c
+++ b/armsrc/lfops.c
@@ -17,6 +17,9 @@
 #include "crapto1.h"
 #include "mifareutil.h"
 
+#define SHORT_COIL()   LOW(GPIO_SSC_DOUT)
+#define OPEN_COIL()            HIGH(GPIO_SSC_DOUT)
+
 void LFSetupFPGAForADC(int divisor, bool lf_field)
 {
        FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
@@ -56,10 +59,9 @@ void DoAcquisition125k_internal(int trigger_threshold, bool silent)
 {
        uint8_t *dest =  mifare_get_bigbufptr();
        int n = 24000;
-       int i;
-
+       int i = 0;
        memset(dest, 0x00, n);
-       i = 0;
+
        for(;;) {
                if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
                        AT91C_BASE_SSC->SSC_THR = 0x43;
@@ -289,17 +291,17 @@ void WriteTIbyte(uint8_t b)
        {
                if (b&(1<<i)) {
                        // stop modulating antenna
-                       LOW(GPIO_SSC_DOUT);
+                       SHORT_COIL();
                        SpinDelayUs(1000);
                        // modulate antenna
-                       HIGH(GPIO_SSC_DOUT);
+                       OPEN_COIL();
                        SpinDelayUs(1000);
                } else {
                        // stop modulating antenna
-                       LOW(GPIO_SSC_DOUT);
+                       SHORT_COIL();
                        SpinDelayUs(300);
                        // modulate antenna
-                       HIGH(GPIO_SSC_DOUT);
+                       OPEN_COIL();
                        SpinDelayUs(1700);
                }
        }
@@ -449,58 +451,82 @@ void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
 
 void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
 {
-       int i;
-       uint8_t *tab = (uint8_t *)BigBuf;
-    
+       int i = 0;
+       uint8_t *buf = (uint8_t *)BigBuf;
+
        FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT);
-    
-       AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT | GPIO_SSC_CLK;
-    
-       AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
-       AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_CLK;
-    
-#define SHORT_COIL()   LOW(GPIO_SSC_DOUT)
-#define OPEN_COIL()            HIGH(GPIO_SSC_DOUT)
-    
-       i = 0;
-       for(;;) {
-               while(!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK)) {
-                       if(BUTTON_PRESS()) {
-                               DbpString("Stopped");
-                               return;
-                       }
-                       WDT_HIT();
+       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+       //FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT);
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_PASSTHRU);
+       
+       // Connect the A/D to the peak-detected low-frequency path.
+       //SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
+               
+       // Configure output and enable pin that is connected to the FPGA (for modulating)
+       AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT | GPIO_SSC_CLK;    
+       AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT;    // (PIO_PER) PIO Enable Register , 
+       AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;    // (PIO_OER) Output Enable Register
+       AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_CLK;     // (PIO_ODR) Output Disable Register
+
+       // Give it a bit of time for the resonant antenna to settle.
+       SpinDelay(150);
+       
+       while(!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK)); // wait for ssp_clk to go high
+       while(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK);    // wait for ssp_clk to go low
+       
+       while(!BUTTON_PRESS()) { 
+               WDT_HIT();
+
+               // PIO_PDSR = Pin Data Status Register  
+               // GPIO_SSC_CLK  = SSC Transmit Clock
+               while(!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK)) {    // wait for ssp_clk to go high
+                        if(BUTTON_PRESS()) {
+                                DbpString("Stopped at 0");
+                                FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
+                                return;
+                        }
+                        WDT_HIT();
                }
         
-               if (ledcontrol)
-                       LED_D_ON();
-        
-               if(tab[i])
-                       OPEN_COIL();
-               else
-                       SHORT_COIL();
-        
-               if (ledcontrol)
-                       LED_D_OFF();
-        
-               while(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK) {
-                       if(BUTTON_PRESS()) {
-                               DbpString("Stopped");
+               // PIO_CODR = Clear Output Data Register
+               // PIO_SODR = Set Output Data Register
+               //#define LOW(x)         AT91C_BASE_PIOA->PIO_CODR = (x)
+               //#define HIGH(x)        AT91C_BASE_PIOA->PIO_SODR = (x)
+               
+               if ( buf[i] > 0 ){
+                       HIGH(GPIO_SSC_DOUT);
+                       //FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+                       //FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_PASSTHRU);
+               } else {
+                       LOW(GPIO_SSC_DOUT);
+                       //FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); 
+               }
+          
+                while(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK) {   // wait for ssp_clk to go low
+                        if(BUTTON_PRESS()) {
+                               DbpString("Stopped at 1");
+                               FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
                                return;
                        }
                        WDT_HIT();
-               }
-        
-               i++;
+                }
+               
+               //SpinDelayUs(512);
+               
+               ++i;
                if(i == period) {
                        i = 0;
                        if (gap) {
-                               SHORT_COIL();
-                               SpinDelayUs(gap);
-                       }
+                               // turn of modulation
+                               LOW(GPIO_SSC_DOUT);
+                               // wait
+                               SpinDelay(gap);
+                       } 
                }
        }
+       DbpString("Stopped");
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+       return;
 }
 
 #define DEBUG_FRAME_CONTENTS 1
@@ -605,6 +631,7 @@ void CmdHIDsimTAG(int hi, int lo, int ledcontrol)
 
        if (ledcontrol)
                LED_A_ON();
+       
        SimulateTagLowFrequency(n, 0, ledcontrol);
 
        if (ledcontrol)
@@ -789,8 +816,6 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
        LFSetupFPGAForADC(0, true);
 
        while(!BUTTON_PRESS()) {
-
-
                WDT_HIT();
                if (ledcontrol) LED_A_ON();