memset(dest,0,n);\r
\r
if(at134khz) {\r
+ FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz\r
FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER | FPGA_LF_READER_USE_134_KHZ);\r
} else {\r
+ FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz\r
FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER | FPGA_LF_READER_USE_125_KHZ);\r
}\r
\r
\r
//-----------------------------------------------------------------------------\r
// Read an ADC channel and block till it completes, then return the result\r
-// in ADC units (0 to 1023). Also a routine to average sixteen samples and\r
+// in ADC units (0 to 1023). Also a routine to average 32 samples and\r
// return that.\r
//-----------------------------------------------------------------------------\r
static int ReadAdc(int ch)\r
\r
return (a + 15) >> 5;\r
}\r
+
+/*
+ * Sweeps the useful LF range of the proxmark from
+ * 46.8kHz (divisor=255) to 600kHz (divisor=19) and
+ * reads the voltage in the antenna: the result is a graph
+ * which should clearly show the resonating frequency of your
+ * LF antenna ( hopefully around 90 if it is tuned to 125kHz!)
+ */\r
+void SweepLFrange()\r
+{\r
+ BYTE *dest = (BYTE *)BigBuf;\r
+ int i;\r
+\r
+ // clear buffer\r
+ memset(BigBuf,0,sizeof(BigBuf));\r
+\r
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);\r
+ for (i=255; i>19; i--) {\r
+ FpgaSendCommand(FPGA_CMD_SET_DIVISOR, i);\r
+ SpinDelay(20);\r
+ dest[i] = (137500 * AvgAdc(4)) >> 18;\r
+ }\r
+}\r
\r
void MeasureAntennaTuning(void)\r
{\r
UsbCommand c;\r
\r
// Let the FPGA drive the low-frequency antenna around 125 kHz.\r
+ FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz\r
FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER | FPGA_LF_READER_USE_125_KHZ);\r
SpinDelay(20);\r
vLf125 = AvgAdc(4);\r
vLf125 = (137500 * vLf125) >> 10;\r
\r
// Let the FPGA drive the low-frequency antenna around 134 kHz.\r
+ FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz\r
FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER | FPGA_LF_READER_USE_134_KHZ);\r
SpinDelay(20);\r
vLf134 = AvgAdc(4);\r
PIO_OUTPUT_DISABLE = (1 << GPIO_SSC_CLK);\r
\r
#define SHORT_COIL() LOW(GPIO_SSC_DOUT)\r
-#define OPEN_COIL() HIGH(GPIO_SSC_DOUT)\r
+#define OPEN_COIL() HIGH(GPIO_SSC_DOUT)\r
\r
i = 0;\r
for(;;) {\r
int m=0, n=0, i=0, idx=0, found=0, lastval=0;\r
DWORD hi=0, lo=0;\r
\r
+ FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz\r
FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER | FPGA_LF_READER_USE_125_KHZ);\r
\r
// Connect the A/D to the peak-detected low-frequency path.\r
dest[i++]=dest[idx-1];\r
dest[i++]=dest[idx-1];\r
break;\r
- // When a logic 0 is immediately followed by the start of the next transmisson \r
+ // When a logic 0 is immediately followed by the start of the next transmisson\r
// (special pattern) a pattern of 4 bit duration lengths is created.\r
case 4:\r
dest[i++]=dest[idx-1];\r
break;\r
\r
case CMD_READER_ISO_15693:\r
- ReaderIso15693(c->ext1); \r
+ ReaderIso15693(c->ext1);\r
break;\r
\r
case CMD_SIMTAG_ISO_15693:\r
- SimTagIso15693(c->ext1); \r
+ SimTagIso15693(c->ext1);\r
break;\r
\r
-\r
case CMD_ACQUIRE_RAW_ADC_SAMPLES_ISO_14443:\r
AcquireRawAdcSamplesIso14443(c->ext1);\r
break;\r
\r
case CMD_READER_ISO_14443a:\r
- ReaderIso14443a(c->ext1); \r
+ ReaderIso14443a(c->ext1);\r
break;\r
\r
case CMD_SNOOP_ISO_14443:\r
LCDReset();\r
break;\r
\r
+ case CMD_SWEEP_LF:\r
+ SweepLFrange();\r
+ break;\r
+\r
+ case CMD_SET_LF_DIVISOR:\r
+ FpgaSendCommand(FPGA_CMD_SET_DIVISOR, c->ext1);\r
+ break;\r
+\r
case CMD_LCD:\r
LCDSend(c->ext1);\r
break;\r
extern DWORD BigBuf[];\r
\r
/// fpga.c\r
+void FpgaSendCommand(WORD cmd, WORD v);\r
void FpgaWriteConfWord(BYTE v);\r
void FpgaDownloadAndGo(void);\r
void FpgaSetupSsc(void);\r
void FpgaSetupSscDma(BYTE *buf, int len);\r
void SetAdcMuxFor(int whichGpio);\r
\r
+// Definitions for the FPGA commands.\r
+#define FPGA_CMD_SET_CONFREG (1<<12)\r
+#define FPGA_CMD_SET_DIVISOR (2<<12)\r
// Definitions for the FPGA configuration word.\r
#define FPGA_MAJOR_MODE_LF_READER (0<<5)\r
#define FPGA_MAJOR_MODE_LF_SIMULATOR (1<<5)\r
( 1 << 24) | // Delay between Consecutive Transfers (32 MCK periods)\r
( 1 << 16) | // Delay Before SPCK (1 MCK period)\r
( 6 << 8) | // Serial Clock Baud Rate (baudrate = MCK/6 = 24Mhz/6 = 4M baud\r
- ( 0 << 4) | // Bits per Transfer (8 bits)\r
+ ( 8 << 4) | // Bits per Transfer (16 bits)\r
( 0 << 3) | // Chip Select inactive after transfer\r
( 1 << 1) | // Clock Phase data captured on leading edge, changes on following edge\r
( 0 << 0); // Clock Polarity inactive state is logic 0\r
LED_D_OFF();\r
}\r
\r
+//-----------------------------------------------------------------------------\r
+// Send a 16 bit command/data pair to the FPGA.\r
+// The bit format is: C3 C2 C1 C0 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0\r
+// where C is the 4 bit command and D is the 12 bit data\r
+//-----------------------------------------------------------------------------\r
+void FpgaSendCommand(WORD cmd, WORD v)\r
+{\r
+ SetupSpi(SPI_FPGA_MODE);\r
+ while ((SPI_STATUS & SPI_STATUS_TX_EMPTY) == 0); // wait for the transfer to complete\r
+ SPI_TX_DATA = SPI_CONTROL_LAST_TRANSFER | cmd | v; // send the data\r
+}\r
//-----------------------------------------------------------------------------\r
// Write the FPGA setup word (that determines what mode the logic is in, read\r
-// vs. clone vs. etc.).\r
+// vs. clone vs. etc.). This is now a special case of FpgaSendCommand() to\r
+// avoid changing this function's occurence everywhere in the source code.\r
//-----------------------------------------------------------------------------\r
void FpgaWriteConfWord(BYTE v)\r
{\r
- SetupSpi(SPI_FPGA_MODE);\r
- while ((SPI_STATUS & SPI_STATUS_TX_EMPTY) == 0); // wait for the transfer to complete\r
- SPI_TX_DATA = SPI_CONTROL_LAST_TRANSFER | v; // send the data\r
+ FpgaSendCommand(FPGA_CMD_SET_CONFREG, v);\r
}\r
\r
//-----------------------------------------------------------------------------\r
+// Generated by rbt2c.pl, do not edit!
+
+//// Xilinx ASCII Bitstream
+//// Created by Bitstream K.31
+//// Design name: fpga-placed.ncd
+//// Architecture: spartan2
+//// Part: 2s30vq100
+//// Date: Thu Apr 09 16:25:33 2009
+//// Bits: 336768
+
+#include <proxmark3.h>
+
+const DWORD FpgaImage[] = {
+ 0xffffffff,
+ 0xaa995566,
+ 0x30008001,
+ 0x00000007,
+ 0x30016001,
+ 0x00000008,
+ 0x30012001,
+ 0x00803f2d,
+ 0x3000c001,
+ 0x00000000,
+ 0x30008001,
+ 0x00000009,
+ 0x30002001,
+ 0x00000000,
+ 0x30008001,
+ 0x00000001,
+ 0x30004000,
+ 0x50002463,
+ 0x00121000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000480,
+ 0x00000000,
+ 0x00121000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000480,
+ 0x00000000,
+ 0x10030000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x001000c0,
+ 0x00000000,
+ 0x00020000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000080,
+ 0x00000000,
+ 0x00120000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000480,
+ 0x00000000,
+ 0x00120000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00100480,
+ 0x00000000,
+ 0x00120000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00100480,
+ 0x00000000,
+ 0xef100060,
+ 0x00180006,
+ 0x00018000,
+ 0x60001800,
+ 0x060001a8,
+ 0x0062005a,
+ 0x80166001,
+ 0xd82fc400,
+ 0x00000000,
+ 0xc005fd00,
+ 0xfe203320,
+ 0x0fc003f2,
+ 0x40fc8033,
+ 0x602cc203,
+ 0x3c00fc40,
+ 0x37c02ce0,
+ 0x03300070,
+ 0x00000000,
+ 0x8010ed40,
+ 0xbbc12220,
+ 0x0b8802e0,
+ 0x80bb000a,
+ 0x4008a402,
+ 0x3cc0b8e0,
+ 0x23d808e6,
+ 0x0be00430,
+ 0x00000000,
+ 0x8805cc90,
+ 0xb2902000,
+ 0x0b0012c0,
+ 0x04b32880,
+ 0x40080386,
+ 0x0c24b064,
+ 0x28d20b24,
+ 0x82230170,
+ 0x00000000,
+ 0xc015ac01,
+ 0xbb812205,
+ 0x0b8022e2,
+ 0x29bb8022,
+ 0x08889106,
+ 0x2c00b802,
+ 0x28c00ba0,
+ 0x02f00460,
+ 0x00000000,
+ 0x0015ec00,
+ 0xf80032b0,
+ 0x8f9603e2,
+ 0x00f9c030,
+ 0x720c9483,
+ 0x2c00f8f0,
+ 0x3ec08fa0,
+ 0x23100470,
+ 0x00000000,
+ 0xe001bc00,
+ 0xff003fa1,
+ 0x8ff403f8,
+ 0x00fd003f,
+ 0xe00ff003,
+ 0xfc00fc80,
+ 0xb7c00ce0,
+ 0x03f80060,
+ 0x00000000,
+ 0x4010ac00,
+ 0xf0103e86,
+ 0x4e9201ed,
+ 0x05f940ba,
+ 0x400c20c3,
+ 0xec00c240,
+ 0x32c00e20,
+ 0x23100420,
+ 0x00000000,
+ 0xc8053c00,
+ 0xbbc42ec0,
+ 0x089c80ed,
+ 0x14b9412a,
+ 0x8008b602,
+ 0xfc008a00,
+ 0xa3c00de0,
+ 0x02320040,
+ 0x00000000,
+ 0xe0054c10,
+ 0xb0c82cf0,
+ 0x082802c8,
+ 0x00b90828,
+ 0x80080002,
+ 0x8c008004,
+ 0x20c08a20,
+ 0x02380050,
+ 0x00000000,
+ 0x00011e04,
+ 0xb4802fe0,
+ 0x085812db,
+ 0x40bf8029,
+ 0x65085806,
+ 0xde008590,
+ 0x20e009e8,
+ 0x02080040,
+ 0x00000000,
+ 0x68080c00,
+ 0xf3003c10,
+ 0x0c2103c8,
+ 0x40b3003a,
+ 0x802c0003,
+ 0xac04ca10,
+ 0x70c00e20,
+ 0x03120200,
+ 0x00000000,
+ 0x401dbc04,
+ 0xff003d80,
+ 0x2be003fc,
+ 0x40f7003f,
+ 0x000fd003,
+ 0xfd20df10,
+ 0x3fd00f60,
+ 0x03d00660,
+ 0x00000000,
+ 0xa805ec4c,
+ 0xf8003ec0,
+ 0x0ca083e2,
+ 0x08cb0030,
+ 0x800ca013,
+ 0xee88c902,
+ 0x32f00ca2,
+ 0x032a0070,
+ 0x00000000,
+ 0x48119c00,
+ 0xb4002dc0,
+ 0x087002d8,
+ 0x040700a1,
+ 0xc0287002,
+ 0xdc008500,
+ 0x21c88a65,
+ 0x02120460,
+ 0x00000000,
+ 0xc0009e80,
+ 0xb7812f20,
+ 0x487812fe,
+ 0x00078021,
+ 0xa0096802,
+ 0xde038788,
+ 0x28e4096a,
+ 0x0a300020,
+ 0x00000000,
+ 0x4814cc00,
+ 0xb3802cf2,
+ 0x083e52cf,
+ 0x008b3022,
+ 0xa5093a42,
+ 0xcc008300,
+ 0x28c00b20,
+ 0x02120430,
+ 0x00000000,
+ 0xe815a808,
+ 0xfe803fa8,
+ 0x0cac03f8,
+ 0x82cec033,
+ 0x800dee03,
+ 0xe800ce00,
+ 0xba800de0,
+ 0x033a0460,
+ 0x00000000,
+ 0x4800e000,
+ 0xf8113e10,
+ 0x2f0103e0,
+ 0x20f8403e,
+ 0x000e8403,
+ 0xe000f800,
+ 0x36000e80,
+ 0x03d20030,
+ 0x00000000,
+ 0x0810e400,
+ 0xf9803e48,
+ 0x0cb40366,
+ 0x00c9a032,
+ 0x400c9203,
+ 0x2400f908,
+ 0x32400f90,
+ 0x03020430,
+ 0x00000000,
+ 0x80046400,
+ 0xb9c92c60,
+ 0x089c0225,
+ 0x40b9c022,
+ 0x40089c02,
+ 0x2400b900,
+ 0xa2400b10,
+ 0x0a200010,
+ 0x00000000,
+ 0x18052400,
+ 0xb9202e40,
+ 0x28908265,
+ 0x00ab0022,
+ 0x40181002,
+ 0x2400b100,
+ 0x22410b90,
+ 0x02060040,
+ 0x00000000,
+ 0x08140500,
+ 0xb1002ec0,
+ 0x08100205,
+ 0x00b14020,
+ 0x50281282,
+ 0x4440b168,
+ 0x20480b93,
+ 0x02020100,
+ 0x00000000,
+ 0xb80d6200,
+ 0xf8803e00,
+ 0x0c880360,
+ 0x00e200b2,
+ 0x000ca20b,
+ 0x0020f020,
+ 0x320c0f02,
+ 0x832e0350,
+ 0x00000000,
+ 0x9815e700,
+ 0xfd403d40,
+ 0x0fb403de,
+ 0x10fd803f,
+ 0x400fd282,
+ 0xa400fd20,
+ 0x3e4c0fd2,
+ 0x03e60670,
+ 0x00000000,
+ 0x1805e400,
+ 0xc9003e40,
+ 0x0c5003e4,
+ 0x00cd0033,
+ 0x400cd003,
+ 0x240ac900,
+ 0x32400c90,
+ 0x03060070,
+ 0x00000000,
+ 0x3810e000,
+ 0x88003a00,
+ 0x08800260,
+ 0x0088a08a,
+ 0x200a8042,
+ 0x20008800,
+ 0x22000880,
+ 0x028e0430,
+ 0x00000000,
+ 0x0805c400,
+ 0x01802a40,
+ 0x081002c4,
+ 0x04838902,
+ 0x4a08100a,
+ 0x04008100,
+ 0x20400810,
+ 0x02020170,
+ 0x00000000,
+ 0x1811a402,
+ 0x89002a40,
+ 0x28984244,
+ 0x00810022,
+ 0x500ab082,
+ 0x24008900,
+ 0x22400890,
+ 0x42860460,
+ 0x00000000,
+ 0xa014a400,
+ 0xc9003a62,
+ 0x0c9c12e7,
+ 0x42c98432,
+ 0x400c9923,
+ 0x2408c900,
+ 0x32400890,
+ 0x03280470,
+ 0x00000000,
+ 0x28008408,
+ 0xfb203ac4,
+ 0x0f90036c,
+ 0x00f9c03e,
+ 0x400f1043,
+ 0xe400f190,
+ 0xbe402f10,
+ 0x03ca0060,
+ 0x00000000,
+ 0x2810a000,
+ 0xf8003e12,
+ 0x0f880321,
+ 0x20f88032,
+ 0x002c8403,
+ 0x0000c800,
+ 0xb2000c80,
+ 0x030a0420,
+ 0x00000000,
+ 0x28042800,
+ 0xbac02ca0,
+ 0x0be0822a,
+ 0x21fe00a1,
+ 0x8008e18a,
+ 0x28008a00,
+ 0x22800da0,
+ 0x028a0040,
+ 0x00000000,
+ 0x28054c00,
+ 0xb2186cf0,
+ 0x0b38120f,
+ 0x00b30028,
+ 0x80083c02,
+ 0x0c069304,
+ 0x22c00830,
+ 0x024a0050,
+ 0x00000000,
+ 0x20011cc0,
+ 0x37002dc2,
+ 0x0b68021c,
+ 0x00a60229,
+ 0x80087006,
+ 0x0c809712,
+ 0x21c00970,
+ 0x02e80040,
+ 0x00000000,
+ 0x28081e00,
+ 0xf7803de2,
+ 0x0f78031e,
+ 0x00bd803b,
+ 0xa00ce803,
+ 0x1e00dfa2,
+ 0x30e00c3b,
+ 0x036b0200,
+ 0x00000000,
+ 0x081dac00,
+ 0xbb403e48,
+ 0x8ba00be8,
+ 0x00f80036,
+ 0x800fa003,
+ 0xec806b40,
+ 0x3edc0fb2,
+ 0x03820660,
+ 0x00000000,
+ 0x4005fe00,
+ 0xffc03360,
+ 0x0ce803fb,
+ 0x08c780b3,
+ 0xa004f803,
+ 0xff24ffc4,
+ 0x33f40df8,
+ 0x83000070,
+ 0x00000000,
+ 0xa8019c00,
+ 0xb7002150,
+ 0x8d4202d8,
+ 0x40860021,
+ 0x800d7003,
+ 0x9c00bf10,
+ 0x21cc08f0,
+ 0x0a2a0060,
+ 0x00000000,
+ 0x00109c00,
+ 0xb50021c2,
+ 0x086006d4,
+ 0x008d4023,
+ 0x82086002,
+ 0xdc00b700,
+ 0x24c01970,
+ 0x02000020,
+ 0x00000000,
+ 0x6014ec00,
+ 0xb3d020c0,
+ 0x092402c2,
+ 0x20801020,
+ 0xb0091002,
+ 0x8c10b340,
+ 0x24c00830,
+ 0x02080430,
+ 0x00000000,
+ 0xa815bc00,
+ 0xfa4032a0,
+ 0x0cb483ec,
+ 0x22cb0033,
+ 0xb00c9a03,
+ 0xfc00ff10,
+ 0xb7c00d70,
+ 0x032a0460,
+ 0x00000000,
+ 0x8000ec00,
+ 0xfb013ed8,
+ 0x0fa401ec,
+ 0x00fa003e,
+ 0x800f9483,
+ 0xec00fb00,
+ 0x38c00fb0,
+ 0x03e00030,
+ 0x00000000,
+ 0x0110fc00,
+ 0xcb0933e8,
+ 0x8fc093fc,
+ 0x00fd0033,
+ 0x820dc803,
+ 0xfc00ff00,
+ 0x3fc00cf0,
+ 0x03004430,
+ 0x00000000,
+ 0x81046c18,
+ 0x83002240,
+ 0x0b8a02ef,
+ 0x00b40029,
+ 0x80088102,
+ 0xec00bb00,
+ 0x2ec00db0,
+ 0x02204010,
+ 0x00000000,
+ 0x80056c00,
+ 0x8b0026c0,
+ 0x0bb802ed,
+ 0x80b98022,
+ 0x80099006,
+ 0xec00bb00,
+ 0x2ec009b0,
+ 0x02200040,
+ 0x00000000,
+ 0x08000c00,
+ 0x830424c0,
+ 0x4b0002cc,
+ 0x00b8802a,
+ 0x80080002,
+ 0xcc00b300,
+ 0x2cc009b0,
+ 0x02020100,
+ 0x00000000,
+ 0x00006c00,
+ 0xc900b6c0,
+ 0x0f8003cc,
+ 0x00ba0032,
+ 0x800da003,
+ 0xfc04ff04,
+ 0x3fc10cf0,
+ 0x03000150,
+ 0x00000000,
+ 0xa015fc02,
+ 0xff0039c0,
+ 0x0fc003fc,
+ 0x00ff003d,
+ 0x800fc003,
+ 0xfc00ff00,
+ 0x3fc00ff0,
+ 0x03e80670,
+ 0x00000000,
+ 0xc005fc00,
+ 0xce103308,
+ 0x2cc00330,
+ 0x80dc2033,
+ 0x400ce803,
+ 0x7e00f780,
+ 0x33f00fec,
+ 0x03300070,
+ 0x00000000,
+ 0x8010ef00,
+ 0x8b10a230,
+ 0x088c0222,
+ 0x00888022,
+ 0x6008a802,
+ 0x0c00b922,
+ 0x20c00b22,
+ 0x02a00430,
+ 0x00000000,
+ 0x8805cc42,
+ 0x8220a004,
+ 0x08241205,
+ 0x10901020,
+ 0x44880002,
+ 0xcc00b308,
+ 0xa0c80b32,
+ 0x02a20170,
+ 0x00000000,
+ 0xc015ac00,
+ 0x8b002202,
+ 0x28a08224,
+ 0x40880822,
+ 0x40088802,
+ 0xac81b900,
+ 0x22c00bb0,
+ 0x02b00460,
+ 0x00000000,
+ 0x4015cc00,
+ 0xc6003310,
+ 0x0cc40332,
+ 0x00dc5033,
+ 0x802c2a03,
+ 0xef80f340,
+ 0x32480fa1,
+ 0x03900470,
+ 0x00000000,
+ 0xe001bc00,
+ 0xff00bd04,
+ 0x0f000be2,
+ 0x04f8803f,
+ 0x822fe003,
+ 0x7600fd00,
+ 0x3f410fe8,
+ 0x03f80060,
+ 0x00000000,
+ 0x40102c00,
+ 0xfa083a10,
+ 0x0da40384,
+ 0x02c06030,
+ 0x840f8403,
+ 0xed20cb00,
+ 0x36400cb8,
+ 0x83100420,
+ 0x00000000,
+ 0xc8053c04,
+ 0xbb00223c,
+ 0x08a48225,
+ 0x00880522,
+ 0xa00b8c02,
+ 0xe6808980,
+ 0x224408bc,
+ 0x02320040,
+ 0x00000000,
+ 0xe0054c00,
+ 0xb24028e0,
+ 0x0b188289,
+ 0x808390a0,
+ 0x500b2082,
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+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x30000001,
+ 0x000004f0,
+ 0x30008001,
+ 0x00000003,
+ 0x30004009,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x30008001,
+ 0x00000005,
+ 0x3000a001,
+ 0x00000000,
+ 0x30000001,
+ 0x0000c17d,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+ 0x00000000,
+};
+
+const DWORD FpgaImageLen = sizeof(FpgaImage) / sizeof(FpgaImage[0]);
+
//-----------------------------------------------------------------------------\r
#include <proxmark3.h>\r
#include "apps.h"\r
-#include "..\common\iso14443_crc.c"\r
+#include "../common/iso14443_crc.c"\r
\r
\r
//static void GetSamplesFor14443(BOOL weTx, int n);\r
//-----------------------------------------------------------------------------\r
#include <proxmark3.h>\r
#include "apps.h"\r
-#include "..\common\iso14443_crc.c"\r
+#include "../common/iso14443_crc.c"\r
\r
typedef enum {\r
SEC_D = 1,\r
\r
// OK we have selected at least at cascade 1, lets see if first byte of UID was 0x88 in \r
// which case we need to make a cascade 2 request and select - this is a long UID\r
- if (receivedAnswer[0] = 0x88)\r
+ if (receivedAnswer[0] == 0x88)\r
{\r
// Do cascade level 2 stuff\r
///////////////////////////////////////////////////////////////////\r
+################\r
+## 2009/04/09 ##\r
+################\r
+winsrc/gui.cpp\r
+ Changes to PaintGraph to create X axis labels that are snapped to a power of two (useful when analysing low freq tags\r
+ with cycle times that are a power of two). Also small changes to keep the X axis labels fixed within the graph window\r
+ as the width of the graph window is resized.\r
+armsrc/apps.h\r
+ New defines for FPGA commands FPGA_CMD_SET_CONFREG, FPGA_CMD_SET_DIVISOR_REG\r
+armsrc/appmain.c\r
+\r
+armsrc/fpga.c\r
+ FpgaWriteConfWord(data) is now a special case of FpgaSendCommand(FPGA_CMD_SET_CONFREG, data) to avoid changing every\r
+ source file containing FpgaWriteConfWord()\r
+fpga/fpga.v\r
+ Changes to the serial conf word, now takes a 4 bit command and 12 bit data code\r
+fpga/lo_read.v\r
+ Significant changes to lo_read, it now can be configured with a divisor value to produce a configurable drive clock\r
+ for the antenna.\r
+ Recompiled FPGA code
+
################
## 2009/04/09 ##
################
`include "util.v"\r
\r
module fpga(\r
- spck, miso, mosi, ncs,\r
+ spcki, miso, mosi, ncs,\r
pck0i, ck_1356meg, ck_1356megb,\r
pwr_lo, pwr_hi, pwr_oe1, pwr_oe2, pwr_oe3, pwr_oe4,\r
adc_d, adc_clk, adc_noe,\r
cross_hi, cross_lo,\r
dbg\r
);\r
- input spck, mosi, ncs;\r
+ input spcki, mosi, ncs;\r
output miso;\r
input pck0i, ck_1356meg, ck_1356megb;\r
output pwr_lo, pwr_hi, pwr_oe1, pwr_oe2, pwr_oe3, pwr_oe4;\r
input cross_hi, cross_lo;\r
output dbg;\r
\r
+//assign pck0 = pck0i;\r
IBUFG #(.IOSTANDARD("DEFAULT") ) pck0b(\r
.O(pck0),\r
.I(pck0i)\r
);\r
-//assign pck0 = pck0i;\r
+//assign spck = spcki;\r
+ IBUFG #(.IOSTANDARD("DEFAULT") ) spckb(\r
+ .O(spck),\r
+ .I(spcki)\r
+ );\r
//-----------------------------------------------------------------------------\r
// The SPI receiver. This sets up the configuration word, which the rest of\r
// the logic looks at to determine how to connect the A/D and the coil\r
// to the configuration bits, for use below.\r
//-----------------------------------------------------------------------------\r
\r
-reg [7:0] conf_word_shift;\r
+reg [15:0] shift_reg;\r
+reg [7:0] divisor;\r
reg [7:0] conf_word;\r
\r
// We switch modes between transmitting to the 13.56 MHz tag and receiving\r
// glitching, or else we will glitch the transmitted carrier.\r
always @(posedge ncs)\r
begin\r
- conf_word <= conf_word_shift;\r
+ case(shift_reg[15:12])\r
+ 4'b0001: conf_word <= shift_reg[7:0];\r
+ 4'b0010: divisor <= shift_reg[7:0];\r
+ endcase\r
end\r
\r
always @(posedge spck)\r
begin\r
if(~ncs)\r
begin\r
- conf_word_shift[7:1] <= conf_word_shift[6:0];\r
- conf_word_shift[0] <= mosi;\r
+ shift_reg[15:1] <= shift_reg[14:0];\r
+ shift_reg[0] <= mosi;\r
end\r
end\r
\r
lr_ssp_frame, lr_ssp_din, ssp_dout, lr_ssp_clk,\r
cross_hi, cross_lo,\r
lr_dbg,\r
- lo_is_125khz\r
+ lo_is_125khz, divisor\r
);\r
\r
lo_simulate ls(\r
//-----------------------------------------------------------------------------\r
// The way that we connect things in low-frequency read mode. In this case\r
-// we are generating the 134 kHz or 125 kHz carrier, and running the \r
+// we are generating the 134 kHz or 125 kHz carrier, and running the\r
// unmodulated carrier at that frequency. The A/D samples at that same rate,\r
// and the result is serialized.\r
//\r
ssp_frame, ssp_din, ssp_dout, ssp_clk,\r
cross_hi, cross_lo,\r
dbg,\r
- lo_is_125khz\r
+ lo_is_125khz, divisor\r
);\r
input pck0, ck_1356meg, ck_1356megb;\r
output pwr_lo, pwr_hi, pwr_oe1, pwr_oe2, pwr_oe3, pwr_oe4;\r
input cross_hi, cross_lo;\r
output dbg;\r
input lo_is_125khz;\r
+ input [7:0] divisor;\r
\r
// The low-frequency RFID stuff. This is relatively simple, because most\r
// of the work happens on the ARM, and we just pass samples through. The\r
// 125 kHz by dividing by a further factor of (8*12*2), or ~134 kHz by\r
// dividing by a factor of (8*11*2) (for 136 kHz, ~2% error, tolerable).\r
\r
-reg [3:0] pck_divider;\r
-reg clk_lo;\r
-\r
-always @(posedge pck0)\r
-begin\r
- if(lo_is_125khz)\r
- begin\r
- if(pck_divider == 4'd11)\r
- begin\r
- pck_divider <= 4'd0;\r
- clk_lo = !clk_lo;\r
- end\r
- else\r
- pck_divider <= pck_divider + 1;\r
- end\r
- else\r
- begin\r
- if(pck_divider == 4'd10)\r
- begin\r
- pck_divider <= 4'd0;\r
- clk_lo = !clk_lo;\r
- end\r
- else\r
- pck_divider <= pck_divider + 1;\r
- end\r
-end\r
-\r
-reg [2:0] carrier_divider_lo;\r
-\r
-always @(posedge clk_lo)\r
-begin\r
- carrier_divider_lo <= carrier_divider_lo + 1;\r
-end\r
-\r
-assign pwr_lo = carrier_divider_lo[2];\r
-\r
-// This serializes the values returned from the A/D, and sends them out\r
-// over the SSP.\r
-\r
reg [7:0] to_arm_shiftreg;\r
+reg [7:0] pck_divider;\r
+reg [6:0] ssp_divider;\r
+reg ant_lo;\r
\r
-always @(posedge clk_lo)\r
+always @(posedge pck0)\r
begin\r
- if(carrier_divider_lo == 3'b000)\r
- to_arm_shiftreg <= adc_d;\r
- else\r
- to_arm_shiftreg[7:1] <= to_arm_shiftreg[6:0];\r
+ if(pck_divider == 8'd0)\r
+ begin\r
+ pck_divider <= divisor[7:0];\r
+ ant_lo = !ant_lo;\r
+ if(ant_lo == 1'b0)\r
+ begin\r
+ ssp_divider <= 7'b0011111;\r
+ to_arm_shiftreg <= adc_d;\r
+ end\r
+ end\r
+ else\r
+ begin\r
+ pck_divider <= pck_divider - 1;\r
+ if(ssp_divider[6] == 1'b0)\r
+ begin\r
+ if (ssp_divider[1:0] == 1'b11) to_arm_shiftreg[7:1] <= to_arm_shiftreg[6:0];\r
+ ssp_divider <= ssp_divider - 1;\r
+ end\r
+ end\r
end\r
\r
-assign ssp_clk = clk_lo;\r
-assign ssp_frame = (carrier_divider_lo == 3'b001);\r
assign ssp_din = to_arm_shiftreg[7];\r
-\r
-// The ADC converts on the falling edge, and our serializer loads when\r
-// carrier_divider_lo == 3'b000.\r
-assign adc_clk = ~carrier_divider_lo[2];\r
-\r
+assign ssp_clk = pck_divider[1];\r
+assign ssp_frame = ~ssp_divider[5];\r
assign pwr_hi = 1'b0;\r
-\r
+assign pwr_lo = ant_lo;\r
+assign adc_clk = ~ant_lo;\r
assign dbg = adc_clk;\r
-\r
endmodule\r
+`include "lo_read_org.v"\r
`include "lo_read.v"\r
-\r
/*\r
pck0 - input main 24Mhz clock (PLL / 4)\r
[7:0] adc_d - input data from A/D converter\r
reg pck0;\r
reg [7:0] adc_d;\r
reg lo_is_125khz;\r
+ reg [15:0] divisor;\r
\r
wire pwr_lo;\r
wire adc_clk;\r
wire cross_hi;\r
wire dbg;\r
\r
- lo_read #(5,200) dut(\r
+ lo_read_org #(5,10) dut1(\r
.pck0(pck0),\r
- .ck_1356meg(ck_1356meg),\r
- .ck_1356megb(ck_1356megb),\r
- .pwr_lo(pwr_lo),\r
- .pwr_hi(pwr_hi),\r
- .pwr_oe1(pwr_oe1),\r
- .pwr_oe2(pwr_oe2),\r
- .pwr_oe3(pwr_oe3),\r
- .pwr_oe4(pwr_oe4),\r
+ .ck_1356meg(ack_1356meg),\r
+ .ck_1356megb(ack_1356megb),\r
+ .pwr_lo(apwr_lo),\r
+ .pwr_hi(apwr_hi),\r
+ .pwr_oe1(apwr_oe1),\r
+ .pwr_oe2(apwr_oe2),\r
+ .pwr_oe3(apwr_oe3),\r
+ .pwr_oe4(apwr_oe4),\r
.adc_d(adc_d),\r
.adc_clk(adc_clk),\r
- .ssp_frame(ssp_frame),\r
- .ssp_din(ssp_din),\r
- .ssp_dout(ssp_dout),\r
- .ssp_clk(ssp_clk),\r
- .cross_hi(cross_hi),\r
- .cross_lo(cross_lo),\r
- .dbg(dbg),\r
+ .ssp_frame(assp_frame),\r
+ .ssp_din(assp_din),\r
+ .ssp_dout(assp_dout),\r
+ .ssp_clk(assp_clk),\r
+ .cross_hi(across_hi),\r
+ .cross_lo(across_lo),\r
+ .dbg(adbg),\r
.lo_is_125khz(lo_is_125khz)\r
);\r
\r
- integer idx, i;\r
+ lo_read #(5,10) dut2(\r
+ .pck0(pck0),\r
+ .ck_1356meg(bck_1356meg),\r
+ .ck_1356megb(bck_1356megb),\r
+ .pwr_lo(bpwr_lo),\r
+ .pwr_hi(bpwr_hi),\r
+ .pwr_oe1(bpwr_oe1),\r
+ .pwr_oe2(bpwr_oe2),\r
+ .pwr_oe3(bpwr_oe3),\r
+ .pwr_oe4(bpwr_oe4),\r
+ .adc_d(adc_d),\r
+ .adc_clk(badc_clk),\r
+ .ssp_frame(bssp_frame),\r
+ .ssp_din(bssp_din),\r
+ .ssp_dout(bssp_dout),\r
+ .ssp_clk(bssp_clk),\r
+ .cross_hi(bcross_hi),\r
+ .cross_lo(bcross_lo),\r
+ .dbg(bdbg),\r
+ .lo_is_125khz(lo_is_125khz),\r
+ .divisor(divisor)\r
+ );\r
+\r
+ integer idx, i, adc_val=8;\r
\r
// main clock\r
always #5 pck0 = !pck0;\r
\r
- //new A/D value available from ADC on positive edge\r
task crank_dut;\r
begin\r
@(posedge adc_clk) ;\r
- adc_d = $random;\r
+ adc_d = adc_val;\r
+ adc_val = (adc_val *2) + 53;\r
end\r
endtask\r
\r
// init inputs\r
pck0 = 0;\r
adc_d = 0;\r
-\r
- // simulate 4 A/D cycles at 134Khz\r
- lo_is_125khz=0;\r
- for (i = 0 ; i < 4 ; i = i + 1) begin\r
- crank_dut;\r
- end\r
+ lo_is_125khz = 1;\r
+ divisor=255; //min 19, 95=125Khz, max 255\r
\r
// simulate 4 A/D cycles at 125Khz\r
- lo_is_125khz=1;\r
- for (i = 0 ; i < 4 ; i = i + 1) begin\r
+ for (i = 0 ; i < 8 ; i = i + 1) begin\r
crank_dut;\r
end\r
$finish;\r
end\r
- \r
endmodule // main\r
#define CMD_SIMULATE_TAG_125K 0x0207\r
#define CMD_HID_DEMOD_FSK 0x0208 // ## New command: demodulate HID tag ID\r
#define CMD_HID_SIM_TAG 0x0209 // ## New command: simulate HID tag by ID\r
+#define CMD_SET_LF_DIVISOR 0x020A\r
+#define CMD_SWEEP_LF 0x020B\r
\r
// For the 13.56 MHz tags\r
#define CMD_ACQUIRE_RAW_ADC_SAMPLES_ISO_15693 0x0300\r
#define CMD_SNOOP_ISO_14443a 0x0383 // ## New snoop command\r
#define CMD_SIMULATE_TAG_ISO_14443a 0x0384 // ## New command: Simulate tag 14443a\r
#define CMD_READER_ISO_14443a 0x0385 // ## New command to act like a 14443a reader\r
-\r
#define CMD_SIMULATE_MIFARE_CARD 0x0386\r
\r
// For measurements of the antenna tuning\r
\r
// For direct FPGA control\r
#define CMD_FPGA_MAJOR_MODE_OFF 0x0500 // ## FPGA Control\r
+#define CMD_TEST 0x0501\r
\r
#endif\r
--- /dev/null
+# merge the code that initially executes out of flash with the RAM image\r
+\r
+($flashFile, $ramFile) = @ARGV;\r
+\r
+open(FLASH, $flashFile) or die "$flashFile: $!\n";\r
+\r
+while(<FLASH>) {\r
+ print if /^S3/;\r
+}\r
+\r
+open(RAM, $ramFile) or die "$ramFile: $!\n";\r
+\r
+while(<RAM>) {\r
+ if(/^S3(..)(........)(.*)/) {\r
+ $addr = sprintf('%08X', hex($2) - 0x00200000 + 0x200);\r
+ print "S3$1$addr$3\n";\r
+ }\r
+}\r
--- /dev/null
+#!/usr/bin/perl\r
+\r
+# This tool converts a Xilinx xxx.rbt FPGA bitstream to a table that will\r
+# compile as C source code. The output format is DWORDs, MSB first.\r
+\r
+print "// Generated by rbt2c.pl, do not edit!\n\n";\r
+\r
+for(1..7) {\r
+ chomp($_ = <>);\r
+ print "//// $_\n";\r
+}\r
+\r
+print <<EOT;\r
+\r
+#include <proxmark3.h>\r
+\r
+const DWORD FpgaImage[] = {\r
+EOT\r
+\r
+while(<>) {\r
+ chomp;\r
+ $v = 0;\r
+ for $b (split(//, $_)) {\r
+ $v <<= 1;\r
+ if($b eq '1') {\r
+ $v |= 1;\r
+ } elsif($b ne '0') {\r
+ die;\r
+ }\r
+ }\r
+ printf("\t0x%08x,\n", $v);\r
+}\r
+\r
+print <<EOT;\r
+};\r
+\r
+const DWORD FpgaImageLen = sizeof(FpgaImage) / sizeof(FpgaImage[0]);\r
+\r
+EOT\r
--- /dev/null
+#!/usr/bin/perl\r
+\r
+# endian-swap S records; we need this because the JTAG tools we're using\r
+# expect the memory image in byte-swapped format\r
+#\r
+# Jonathan Westhues, April 2004\r
+\r
+if(@ARGV == 0) {\r
+ die "usage: $0 file-to-endian-swap.s19 > out.s19\n";\r
+}\r
+\r
+while(<>) {\r
+ chomp;\r
+\r
+ if(/^S0/) {\r
+ next;\r
+ }\r
+ if(/^S7/) {\r
+ print "$_\n";\r
+ next;\r
+ }\r
+\r
+ if(not /^S3(..)(........)(.*)(..)$/) {\r
+ die "bad S record at line $.\n";\r
+ }\r
+\r
+ $data = $3;\r
+ $checksum = $4;\r
+\r
+ print "S3$1$2";\r
+ while($data =~ m#(..)(..)(..)(..)#g) {\r
+ print "$4$3$2$1";\r
+ }\r
+ print "$checksum\n";\r
+}\r
* routine, feel free to improve...
*
* 1st argument: clock rate (as number of samples per clock rate)
+ * Typical values can be 64, 32, 128...
*/
static void Cmdmanchesterdemod(char *str) {
int i;
int lastval;
int lc = 0;
int bitidx = 0;
- int bitidx2;
+ int bit2idx = 0;
sscanf(str, "%i", &clock);
int tolerance = clock/4;
- /* Holds the decoded bitstream. */
- int BitStream[MAX_GRAPH_TRACE_LEN*2];
- int BitStream2[MAX_GRAPH_TRACE_LEN];
+ /* Holds the decoded bitstream: each clock period contains 2 bits */
+ /* later simplified to 1 bit after manchester decoding. */
+ /* Add 10 bits to allow for noisy / uncertain traces without aborting */
+ /* int BitStream[GraphTraceLen*2/clock+10]; */
+
+ /* But it does not work if compiling on WIndows: therefore we just allocate a */
+ /* large array */
+ int BitStream[MAX_GRAPH_TRACE_LEN];
/* Detect first transition */
- /* Lo-Hi (arbitrary) */
+ /* Lo-Hi (arbitrary) */
for(i=1;i<GraphTraceLen;i++) {
if (GraphBuffer[i-1]<GraphBuffer[i]) {
lastval = i;
}
/* Then detect duration between 2 successive transitions */
- /* At this stage, GraphTrace is either 0 or 1 */
for(bitidx = 1 ;i<GraphTraceLen;i++) {
if (GraphBuffer[i-1] != GraphBuffer[i]) {
lc = i-lastval;
lastval = i;
+ // Error check: if bitidx becomes too large, we do not
+ // have a Manchester encoded bitstream or the clock is really
+ // wrong!
+ if (bitidx > (GraphTraceLen*2/clock+8) ) {
+ PrintToScrollback("Error: the clock you gave is probably wrong, aborting.");
+ return;
+ }
// Then switch depending on lc length:
// Tolerance is 1/4 of clock rate (arbitrary)
- if ((lc-clock/2) < tolerance) {
- // Short pulse
+ if (abs(lc-clock/2) < tolerance) {
+ // Short pulse : either "1" or "0"
BitStream[bitidx++]=GraphBuffer[i-1];
- } else if ((lc-clock) < tolerance) {
- // Long pulse
+ } else if (abs(lc-clock) < tolerance) {
+ // Long pulse: either "11" or "00"
BitStream[bitidx++]=GraphBuffer[i-1];
BitStream[bitidx++]=GraphBuffer[i-1];
} else {
}
// At this stage, we now have a bitstream of "01" ("1") or "10" ("0"), parse it into final decoded bitstream
- for (bitidx2 = 0; bitidx2<bitidx; bitidx2 += 2) {
- if ((BitStream[bitidx2] == 0) && (BitStream[bitidx2+1] == 1)) {
- BitStream2[bitidx2/2] = 1;
- } else if ((BitStream[bitidx2] == 1) && (BitStream[bitidx2+1] == 0)) {
- BitStream2[bitidx2/2] = 0;
+ // Actually, we overwrite BitStream with the new decoded bitstream, we just need to be careful
+ // to stop output at the final bitidx2 value, not bitidx
+ for (i = 0; i < bitidx; i += 2) {
+ if ((BitStream[i] == 0) && (BitStream[i+1] == 1)) {
+ BitStream[bit2idx++] = 1;
+ } else if ((BitStream[i] == 1) && (BitStream[i+1] == 0)) {
+ BitStream[bit2idx++] = 0;
} else {
// We cannot end up in this state, this means we are unsynchronized,
// move up 1 bit:
- bitidx2++;
+ i++;
PrintToScrollback("Unsynchronized, resync...");
PrintToScrollback("(too many of those messages mean the stream is not Manchester encoded)");
}
}
PrintToScrollback("Manchester decoded bitstream \n---------");
// Now output the bitstream to the scrollback by line of 16 bits
- for (i = 0; i<bitidx/2; i+=16) {
+ for (i = 0; i < (bit2idx-16); i+=16) {
PrintToScrollback("%i %i %i %i %i %i %i %i %i %i %i %i %i %i %i %i",
- BitStream2[i],
- BitStream2[i+1],
- BitStream2[i+2],
- BitStream2[i+3],
- BitStream2[i+4],
- BitStream2[i+5],
- BitStream2[i+6],
- BitStream2[i+7],
- BitStream2[i+8],
- BitStream2[i+9],
- BitStream2[i+10],
- BitStream2[i+11],
- BitStream2[i+12],
- BitStream2[i+13],
- BitStream2[i+14],
- BitStream2[i+15]);
+ BitStream[i],
+ BitStream[i+1],
+ BitStream[i+2],
+ BitStream[i+3],
+ BitStream[i+4],
+ BitStream[i+5],
+ BitStream[i+6],
+ BitStream[i+7],
+ BitStream[i+8],
+ BitStream[i+9],
+ BitStream[i+10],
+ BitStream[i+11],
+ BitStream[i+12],
+ BitStream[i+13],
+ BitStream[i+14],
+ BitStream[i+15]);
}
}
static void CmdTest(char *str)\r
{\r
}\r
+
+/*
+ * Sets the divisor for LF frequency clock: lets the user choose any LF frequency below
+ * 600kHz.
+ */
+static void CmdSetDivisor(char *str)\r
+{\r
+ UsbCommand c;\r
+ c.cmd = CMD_SET_LF_DIVISOR;\r
+ c.ext1 = atoi(str);\r
+ if (( c.ext1<0) || (c.ext1>255)) {\r
+ PrintToScrollback("divisor must be between 19 and 255");\r
+ } else {\r
+ SendCommand(&c, FALSE);\r
+ PrintToScrollback("Divisor set, expected freq=%dHz", 12000000/(c.ext1+1));\r
+ }\r
+}\r
+\r
+static void CmdSweepLF(char *str)\r
+{\r
+ UsbCommand c;\r
+ c.cmd = CMD_SWEEP_LF;\r
+ SendCommand(&c, FALSE);\r
+}\r
+
+
\r
typedef void HandlerFunction(char *cmdline);\r
\r
"lcdreset", CmdLcdReset, "Hardware reset LCD",\r
"lcd", CmdLcd, "Send command/data to LCD",\r
"test", CmdTest, "Placeholder command for testing new code",\r
+ "setlfdivisor", CmdSetDivisor, "Drive LF antenna at 12Mhz/(divisor+1)",\r
+ "sweeplf", CmdSweepLF, "Sweep through LF freq range and store results in buffer",\r
"quit", CmdQuit, "quit program"\r
};\r
\r
\r
}\r
int CommandFinished;\r
+int offset = 64;\r
\r
static void ResizeCommandWindow(void)\r
{\r
\r
SelectObject(hdc, WhitePen);\r
\r
- MoveToEx(hdc, r.left + 40, r.top, NULL);\r
- LineTo(hdc, r.left + 40, r.bottom);\r
+ MoveToEx(hdc, r.left + offset, r.top, NULL);\r
+ LineTo(hdc, r.left + offset, r.bottom);\r
\r
int zeroHeight = r.top + (r.bottom - r.top) / 2;\r
SelectObject(hdc, GreyPen);\r
LineTo(hdc, r.right, zeroHeight);\r
\r
int startMax =\r
- (GraphTraceLen - (int)((r.right - r.left - 40) / GraphPixelsPerPoint));\r
+ (GraphTraceLen - (int)((r.right - r.left - offset) / GraphPixelsPerPoint));\r
if(startMax < 0) {\r
startMax = 0;\r
}\r
if(fabs((double)GraphBuffer[i]) > absYMax) {\r
absYMax = (int)fabs((double)GraphBuffer[i]);\r
}\r
- int x = 40 + (int)((i - GraphStart)*GraphPixelsPerPoint);\r
+ int x = offset + (int)((i - GraphStart)*GraphPixelsPerPoint);\r
if(x > r.right) {\r
break;\r
}\r
SetBkColor(hdc, RGB(0, 0, 0));\r
\r
// number of points that will be plotted\r
- int span = (int)((r.right - r.left) / GraphPixelsPerPoint);\r
- // one label every 100 pixels, let us say\r
- int labels = (r.right - r.left - 40) / 100;\r
+ double span = (int)((r.right - r.left) / GraphPixelsPerPoint);\r
+\r
+ // one label every offset pixels, let us say\r
+ int labels = (r.right - r.left - offset) / offset;\r
if(labels <= 0) labels = 1;\r
- int pointsPerLabel = span / labels;\r
+ // round to nearest power of 2\r
+ int pointsPerLabel = (int)(log(span / labels)/log(2.0));\r
if(pointsPerLabel <= 0) pointsPerLabel = 1;\r
+ pointsPerLabel = (int)pow(2.0,pointsPerLabel);\r
\r
int yMin = INT_MAX;\r
int yMax = INT_MIN;\r
if(i >= GraphTraceLen) {\r
break;\r
}\r
- int x = 40 + (int)((i - GraphStart)*GraphPixelsPerPoint);\r
+ int x = offset + (int)((i - GraphStart)*GraphPixelsPerPoint);\r
if(x > r.right + GraphPixelsPerPoint) {\r
break;\r
}\r
\r
if(((i - GraphStart) % pointsPerLabel == 0) && i != GraphStart) {\r
SelectObject(hdc, WhitePen);\r
- MoveToEx(hdc, x, zeroHeight - 3, NULL);\r
- LineTo(hdc, x, zeroHeight + 3);\r
+ MoveToEx(hdc, x, zeroHeight - 8, NULL);\r
+ LineTo(hdc, x, zeroHeight + 8);\r
\r
char str[100];\r
sprintf(str, "+%d", (i - GraphStart));\r
}\r
\r
char str[100];\r
- sprintf(str, "@%d max=%d min=%d mean=%d n=%d/%d dt=%d [%.3f]",\r
+ sprintf(str, "@%d max=%d min=%d mean=%d n=%d/%d dt=%d [%.3f] zoom=%.3f",\r
GraphStart, yMax, yMin, yMean, n, GraphTraceLen,\r
- CursorBPos - CursorAPos, (CursorBPos - CursorAPos)/CursorScaleFactor);\r
+ CursorBPos - CursorAPos, (CursorBPos - CursorAPos)/CursorScaleFactor, GraphPixelsPerPoint);\r
TextOut(hdc, 50, r.bottom - 20, str, strlen(str));\r
}\r
\r
case WM_KEYDOWN:\r
switch(wParam) {\r
case VK_DOWN:\r
- if(GraphPixelsPerPoint <= 50) {\r
+ if(GraphPixelsPerPoint <= 8) {\r
GraphPixelsPerPoint *= 2;\r
}\r
break;\r
\r
case VK_UP:\r
- if(GraphPixelsPerPoint >= 0.02) {\r
+ if(GraphPixelsPerPoint >= 0.01) {\r
GraphPixelsPerPoint /= 2;\r
}\r
break;\r
\r
case VK_RIGHT:\r
- if(GraphPixelsPerPoint < 20) {\r
- GraphStart += (int)(20 / GraphPixelsPerPoint);\r
+ if(GraphPixelsPerPoint < 16) {\r
+ GraphStart += (int)(16 / GraphPixelsPerPoint);\r
} else {\r
GraphStart++;\r
}\r
break;\r
\r
case VK_LEFT:\r
- if(GraphPixelsPerPoint < 20) {\r
- GraphStart -= (int)(20 / GraphPixelsPerPoint);\r
+ if(GraphPixelsPerPoint < 16) {\r
+ GraphStart -= (int)(16 / GraphPixelsPerPoint);\r
} else {\r
GraphStart--;\r
}\r
case WM_LBUTTONDOWN:\r
case WM_RBUTTONDOWN: {\r
int x = LOWORD(lParam);\r
- x -= 40;\r
+ x -= offset;\r
x = (int)(x / GraphPixelsPerPoint);\r
x += GraphStart;\r
if(msg == WM_LBUTTONDOWN) {\r
projects / proxmark3-svn / commitdiff