#include "apps.h"
#include "util.h"
#include "string.h"
+#include "printf.h"
#include "common.h"
#include "cmd.h"
#include "iso14443a.h"
+#include "iso15693.h"
// Needed for CRC in emulation mode;
// same construction as in ISO 14443;
// different initial value (CRC_ICLASS)
}
}
-//-----------------------------------------------------------------------------
-// Wait for commands from reader
-// Stop when button is pressed
-// Or return true when command is captured
-//-----------------------------------------------------------------------------
-static int GetIClassCommandFromReader(uint8_t *received, int *len, int maxLen) {
- // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
- // only, since we are receiving, not transmitting).
- // Signal field is off with the appropriate LED
- LED_D_OFF();
- FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
-
- // Now run a `software UART' on the stream of incoming samples.
- Uart.output = received;
- Uart.byteCntMax = maxLen;
- Uart.state = STATE_UNSYNCD;
-
- for (;;) {
- WDT_HIT();
-
- if (BUTTON_PRESS()) return false;
-
- if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
- AT91C_BASE_SSC->SSC_THR = 0x00;
- }
- if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
- uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
-
- if (OutOfNDecoding(b & 0x0f)) {
- *len = Uart.byteCnt;
- return true;
- }
- }
- }
-}
-
-static uint8_t encode4Bits(const uint8_t b) {
- uint8_t c = b & 0xF;
- // OTA, the least significant bits first
- // The columns are
- // 1 - Bit value to send
- // 2 - Reversed (big-endian)
- // 3 - Manchester Encoded
- // 4 - Hex values
-
- switch(c){
- // 1 2 3 4
- case 15: return 0x55; // 1111 -> 1111 -> 01010101 -> 0x55
- case 14: return 0x95; // 1110 -> 0111 -> 10010101 -> 0x95
- case 13: return 0x65; // 1101 -> 1011 -> 01100101 -> 0x65
- case 12: return 0xa5; // 1100 -> 0011 -> 10100101 -> 0xa5
- case 11: return 0x59; // 1011 -> 1101 -> 01011001 -> 0x59
- case 10: return 0x99; // 1010 -> 0101 -> 10011001 -> 0x99
- case 9: return 0x69; // 1001 -> 1001 -> 01101001 -> 0x69
- case 8: return 0xa9; // 1000 -> 0001 -> 10101001 -> 0xa9
- case 7: return 0x56; // 0111 -> 1110 -> 01010110 -> 0x56
- case 6: return 0x96; // 0110 -> 0110 -> 10010110 -> 0x96
- case 5: return 0x66; // 0101 -> 1010 -> 01100110 -> 0x66
- case 4: return 0xa6; // 0100 -> 0010 -> 10100110 -> 0xa6
- case 3: return 0x5a; // 0011 -> 1100 -> 01011010 -> 0x5a
- case 2: return 0x9a; // 0010 -> 0100 -> 10011010 -> 0x9a
- case 1: return 0x6a; // 0001 -> 1000 -> 01101010 -> 0x6a
- default: return 0xaa; // 0000 -> 0000 -> 10101010 -> 0xaa
-
- }
-}
-
-//-----------------------------------------------------------------------------
-// Prepare tag messages
-//-----------------------------------------------------------------------------
-static void CodeIClassTagAnswer(const uint8_t *cmd, int len) {
-
- /*
- * SOF comprises 3 parts;
- * * An unmodulated time of 56.64 us
- * * 24 pulses of 423.75 kHz (fc/32)
- * * A logic 1, which starts with an unmodulated time of 18.88us
- * followed by 8 pulses of 423.75kHz (fc/32)
- *
- *
- * EOF comprises 3 parts:
- * - A logic 0 (which starts with 8 pulses of fc/32 followed by an unmodulated
- * time of 18.88us.
- * - 24 pulses of fc/32
- * - An unmodulated time of 56.64 us
- *
- *
- * A logic 0 starts with 8 pulses of fc/32
- * followed by an unmodulated time of 256/fc (~18,88us).
- *
- * A logic 0 starts with unmodulated time of 256/fc (~18,88us) followed by
- * 8 pulses of fc/32 (also 18.88us)
- *
- * The mode FPGA_HF_SIMULATOR_MODULATE_424K_8BIT which we use to simulate tag,
- * works like this.
- * - A 1-bit input to the FPGA becomes 8 pulses on 423.5kHz (fc/32) (18.88us).
- * - A 0-bit input to the FPGA becomes an unmodulated time of 18.88us
- *
- * In this mode the SOF can be written as 00011101 = 0x1D
- * The EOF can be written as 10111000 = 0xb8
- * A logic 1 is 01
- * A logic 0 is 10
- *
- * */
-
- int i;
-
- ToSendReset();
-
- // Send SOF
- ToSend[++ToSendMax] = 0x1D;
-
- for (i = 0; i < len; i++) {
- uint8_t b = cmd[i];
- ToSend[++ToSendMax] = encode4Bits(b & 0xF); // Least significant half
- ToSend[++ToSendMax] = encode4Bits((b >>4) & 0xF); // Most significant half
- }
-
- // Send EOF
- ToSend[++ToSendMax] = 0xB8;
- //lastProxToAirDuration = 8*ToSendMax - 3*8 - 3*8;//Not counting zeroes in the beginning or end
- // Convert from last byte pos to length
- ToSendMax++;
-}
-
-// Only SOF
+// Encode SOF only
static void CodeIClassTagSOF() {
//So far a dummy implementation, not used
//int lastProxToAirDuration =0;
ComputeCrc14443(CRC_ICLASS, data, len, data+len, data+len+1);
}
-static int SendIClassAnswer(uint8_t *resp, int respLen, int delay) {
- int i = 0, d = 0;//, u = 0, d = 0;
- uint8_t b = 0;
-
- //FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR|FPGA_HF_SIMULATOR_MODULATE_424K);
- FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_424K_8BIT);
-
- AT91C_BASE_SSC->SSC_THR = 0x00;
- FpgaSetupSsc(FPGA_MAJOR_MODE_HF_SIMULATOR);
- while (true) {
- if ((AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)){
- b = AT91C_BASE_SSC->SSC_RHR;
- (void) b;
- }
- if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)){
- b = 0x00;
- if (d < delay) {
- // send 0x00 byte (causing a 2048/13,56MHz = 151us delay)
- d++;
- } else {
- if (i < respLen) {
- b = resp[i];
- }
- i++;
- }
- AT91C_BASE_SSC->SSC_THR = b;
- }
-
-// if (i > respLen +4) break;
- if (i > respLen + 1) break;
- // send 2 more 0x00 bytes (causing a 302us delay)
- }
-
- return 0;
-}
-
-
/**
* @brief Does the actual simulation
// Prepare card messages
ToSendMax = 0;
- // First card answer: SOF
+ // First card answer: SOF only
CodeIClassTagSOF();
memcpy(resp_sof, ToSend, ToSendMax);
resp_sof_Len = ToSendMax;
// Anticollision CSN
- CodeIClassTagAnswer(anticoll_data, sizeof(anticoll_data));
+ CodeIso15693AsTag(anticoll_data, sizeof(anticoll_data));
memcpy(resp_anticoll, ToSend, ToSendMax);
resp_anticoll_len = ToSendMax;
// CSN (block 0)
- CodeIClassTagAnswer(csn_data, sizeof(csn_data));
+ CodeIso15693AsTag(csn_data, sizeof(csn_data));
memcpy(resp_csn, ToSend, ToSendMax);
resp_csn_len = ToSendMax;
// Configuration (block 1)
- CodeIClassTagAnswer(conf_data, sizeof(conf_data));
+ CodeIso15693AsTag(conf_data, sizeof(conf_data));
memcpy(resp_conf, ToSend, ToSendMax);
resp_conf_len = ToSendMax;
// e-Purse (block 2)
- CodeIClassTagAnswer(card_challenge_data, sizeof(card_challenge_data));
+ CodeIso15693AsTag(card_challenge_data, sizeof(card_challenge_data));
memcpy(resp_cc, ToSend, ToSendMax);
resp_cc_len = ToSendMax;
// Application Issuer Area (block 5)
- CodeIClassTagAnswer(aia_data, sizeof(aia_data));
+ CodeIso15693AsTag(aia_data, sizeof(aia_data));
memcpy(resp_aia, ToSend, ToSendMax);
resp_aia_len = ToSendMax;
uint8_t *data_generic_trace = BigBuf_malloc(8 + 2); // 8 bytes data + 2byte CRC is max tag answer
uint8_t *data_response = BigBuf_malloc( (8 + 2) * 2 + 2);
- FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
- SpinDelay(100);
- StartCountSspClk();
- // We need to listen to the high-frequency, peak-detected path.
- SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
- FpgaSetupSsc(FPGA_MAJOR_MODE_HF_ISO14443A);
-
- uint32_t time_0 = GetCountSspClk();
- uint32_t t2r_time =0;
- uint32_t r2t_time =0;
-
LED_A_ON();
bool buttonPressed = false;
- uint8_t response_delay = 1;
while (!exitLoop) {
WDT_HIT();
- response_delay = 1;
LED_B_OFF();
//Signal tracer
// Can be used to get a trigger for an oscilloscope..
LED_C_OFF();
- if (!GetIClassCommandFromReader(receivedCmd, &len, 100)) {
+ uint32_t reader_eof_time = 0;
+ len = GetIso15693CommandFromReader(receivedCmd, MAX_FRAME_SIZE, &reader_eof_time);
+ if (len < 0) {
buttonPressed = true;
break;
}
- r2t_time = GetCountSspClk();
+
//Signal tracer
LED_C_ON();
trace_data = anticoll_data;
trace_data_size = sizeof(anticoll_data);
//DbpString("Reader requests anticollission CSN:");
-
+
} else if (receivedCmd[0] == ICLASS_CMD_READ_OR_IDENTIFY && len == 4) { // read block
uint16_t blockNo = receivedCmd[1];
if (simulationMode != ICLASS_SIM_MODE_FULL) {
AppendCrc(data_generic_trace, 8);
trace_data = data_generic_trace;
trace_data_size = 10;
- CodeIClassTagAnswer(trace_data, trace_data_size);
+ CodeIso15693AsTag(trace_data, trace_data_size);
memcpy(data_response, ToSend, ToSendMax);
modulated_response = data_response;
modulated_response_size = ToSendMax;
} else if (receivedCmd[0] == ICLASS_CMD_CHECK) {
// Reader random and reader MAC!!!
if (simulationMode == ICLASS_SIM_MODE_FULL) {
- //NR, from reader, is in receivedCmd +1
+ //NR, from reader, is in receivedCmd+1
opt_doTagMAC_2(cipher_state, receivedCmd+1, data_generic_trace, diversified_key);
trace_data = data_generic_trace;
trace_data_size = 4;
- CodeIClassTagAnswer(trace_data, trace_data_size);
+ CodeIso15693AsTag(trace_data, trace_data_size);
memcpy(data_response, ToSend, ToSendMax);
modulated_response = data_response;
modulated_response_size = ToSendMax;
- response_delay = 0; //We need to hurry here... (but maybe not too much... ??)
//exitLoop = true;
} else { // Not fullsim, we don't respond
// We do not know what to answer, so lets keep quiet
if (simulationMode == ICLASS_SIM_MODE_EXIT_AFTER_MAC) {
- // dbprintf:ing ...
- Dbprintf("CSN: %02x %02x %02x %02x %02x %02x %02x %02x"
- ,csn[0],csn[1],csn[2],csn[3],csn[4],csn[5],csn[6],csn[7]);
- Dbprintf("RDR: (len=%02d): %02x %02x %02x %02x %02x %02x %02x %02x %02x",len,
- receivedCmd[0], receivedCmd[1], receivedCmd[2],
- receivedCmd[3], receivedCmd[4], receivedCmd[5],
- receivedCmd[6], receivedCmd[7], receivedCmd[8]);
if (reader_mac_buf != NULL) {
// save NR and MAC for sim 2,4
memcpy(reader_mac_buf + 8, receivedCmd + 1, 8);
// OBS! If this is implemented, don't forget to regenerate the cipher_state
// We're expected to respond with the data+crc, exactly what's already in the receivedCmd
// receivedCmd is now UPDATE 1b | ADDRESS 1b | DATA 8b | Signature 4b or CRC 2b
-
- //Take the data...
memcpy(data_generic_trace, receivedCmd + 2, 8);
- //Add crc
AppendCrc(data_generic_trace, 8);
trace_data = data_generic_trace;
trace_data_size = 10;
- CodeIClassTagAnswer(trace_data, trace_data_size);
+ CodeIso15693AsTag(trace_data, trace_data_size);
memcpy(data_response, ToSend, ToSendMax);
modulated_response = data_response;
modulated_response_size = ToSendMax;
// Otherwise, we should answer 8bytes (block) + 2bytes CRC
} else {
- //#db# Unknown command received from reader (len=5): 26 1 0 f6 a 44 44 44 44
// Never seen this command before
- print_result("Unhandled command received from reader ", receivedCmd, len);
+ char debug_message[250]; // should be enough
+ sprintf(debug_message, "Unhandled command (len = %d) received from reader:", len);
+ for (int i = 0; i < len && strlen(debug_message) < sizeof(debug_message) - 3 - 1; i++) {
+ sprintf(debug_message + strlen(debug_message), " %02x", receivedCmd[i]);
+ }
+ Dbprintf("%s", debug_message);
// Do not respond
}
A legit tag has about 330us delay between reader EOT and tag SOF.
**/
if (modulated_response_size > 0) {
- SendIClassAnswer(modulated_response, modulated_response_size, response_delay);
- t2r_time = GetCountSspClk();
+ uint32_t response_time = reader_eof_time + DELAY_ISO15693_VCD_TO_VICC_SIM - DELAY_ARM_TO_READER_SIM;
+ TransmitTo15693Reader(modulated_response, modulated_response_size, response_time, false);
+ LogTrace(trace_data, trace_data_size, response_time + DELAY_ARM_TO_READER_SIM, response_time + (modulated_response_size << 6) + DELAY_ARM_TO_READER_SIM, NULL, false);
}
- uint8_t parity[MAX_PARITY_SIZE];
- GetParity(receivedCmd, len, parity);
- LogTrace(receivedCmd, len, (r2t_time-time_0) << 4, (r2t_time-time_0) << 4, parity, true);
-
- if (trace_data != NULL) {
- GetParity(trace_data, trace_data_size, parity);
- LogTrace(trace_data, trace_data_size, (t2r_time-time_0) << 4, (t2r_time-time_0) << 4, parity, false);
- }
- if (!get_tracing()) {
- DbpString("Trace full");
- //break;
- }
}
LED_A_OFF();
uint32_t simType = arg0;
uint32_t numberOfCSNS = arg1;
+ // setup hardware for simulation:
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
+ SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
+ FpgaSetupSsc(FPGA_MAJOR_MODE_HF_SIMULATOR);
+ StartCountSspClk();
// Enable and clear the trace
set_tracing(true);
// Button pressed
break;
}
+ Dbprintf("CSN: %02x %02x %02x %02x %02x %02x %02x %02x",
+ datain[i*8+0], datain[i*8+1], datain[i*8+2], datain[i*8+3],
+ datain[i*8+4], datain[i*8+5], datain[i*8+6], datain[i*8+7]);
+ Dbprintf("NR,MAC: %02x %02x %02x %02x %02x %02x %02x %02x",
+ datain[i*8+ 8], datain[i*8+ 9], datain[i*8+10], datain[i*8+11],
+ datain[i*8+12], datain[i*8+13], datain[i*8+14], datain[i*8+15]);
}
cmd_send(CMD_ACK, CMD_SIMULATE_TAG_ICLASS, i, 0, mac_responses, i*16);
} else if (simType == ICLASS_SIM_MODE_FULL) {
///////////////////////////////////////////////////////////////////////
// ISO 15693 Part 2 - Air Interface
-// This section basicly contains transmission and receiving of bits
+// This section basically contains transmission and receiving of bits
///////////////////////////////////////////////////////////////////////
-#define Crc(data,datalen) Iso15693Crc(data,datalen)
-#define AddCrc(data,datalen) Iso15693AddCrc(data,datalen)
-#define sprintUID(target,uid) Iso15693sprintUID(target,uid)
-
// buffers
-#define ISO15693_DMA_BUFFER_SIZE 2048 // must be a power of 2
+#define ISO15693_DMA_BUFFER_SIZE 2048 // must be a power of 2
#define ISO15693_MAX_RESPONSE_LENGTH 36 // allows read single block with the maximum block size of 256bits. Read multiple blocks not supported yet
#define ISO15693_MAX_COMMAND_LENGTH 45 // allows write single block with the maximum block size of 256bits. Write multiple blocks not supported yet
-// timing. Delays in SSP_CLK ticks.
-// SSP_CLK runs at 13,56MHz / 32 = 423.75kHz when simulating a tag
-#define DELAY_READER_TO_ARM_SIM 8
-#define DELAY_ARM_TO_READER_SIM 1
-#define DELAY_ISO15693_VCD_TO_VICC_SIM 132 // 132/423.75kHz = 311.5us from end of command EOF to start of tag response
-//SSP_CLK runs at 13.56MHz / 4 = 3,39MHz when acting as reader
-#define DELAY_ISO15693_VCD_TO_VICC_READER 1056 // 1056/3,39MHz = 311.5us from end of command EOF to start of tag response
-#define DELAY_ISO15693_VICC_TO_VCD_READER 1017 // 1017/3.39MHz = 300us between end of tag response and next reader command
-
// ---------------------------
// Signal Processing
// ---------------------------
}
-static void CodeIso15693AsTag(uint8_t *cmd, int n)
-{
+// static uint8_t encode4Bits(const uint8_t b) {
+ // uint8_t c = b & 0xF;
+ // // OTA, the least significant bits first
+ // // The columns are
+ // // 1 - Bit value to send
+ // // 2 - Reversed (big-endian)
+ // // 3 - Manchester Encoded
+ // // 4 - Hex values
+
+ // switch(c){
+ // // 1 2 3 4
+ // case 15: return 0x55; // 1111 -> 1111 -> 01010101 -> 0x55
+ // case 14: return 0x95; // 1110 -> 0111 -> 10010101 -> 0x95
+ // case 13: return 0x65; // 1101 -> 1011 -> 01100101 -> 0x65
+ // case 12: return 0xa5; // 1100 -> 0011 -> 10100101 -> 0xa5
+ // case 11: return 0x59; // 1011 -> 1101 -> 01011001 -> 0x59
+ // case 10: return 0x99; // 1010 -> 0101 -> 10011001 -> 0x99
+ // case 9: return 0x69; // 1001 -> 1001 -> 01101001 -> 0x69
+ // case 8: return 0xa9; // 1000 -> 0001 -> 10101001 -> 0xa9
+ // case 7: return 0x56; // 0111 -> 1110 -> 01010110 -> 0x56
+ // case 6: return 0x96; // 0110 -> 0110 -> 10010110 -> 0x96
+ // case 5: return 0x66; // 0101 -> 1010 -> 01100110 -> 0x66
+ // case 4: return 0xa6; // 0100 -> 0010 -> 10100110 -> 0xa6
+ // case 3: return 0x5a; // 0011 -> 1100 -> 01011010 -> 0x5a
+ // case 2: return 0x9a; // 0010 -> 0100 -> 10011010 -> 0x9a
+ // case 1: return 0x6a; // 0001 -> 1000 -> 01101010 -> 0x6a
+ // default: return 0xaa; // 0000 -> 0000 -> 10101010 -> 0xaa
+
+ // }
+// }
+
+void CodeIso15693AsTag(uint8_t *cmd, size_t len) {
+ /*
+ * SOF comprises 3 parts;
+ * * An unmodulated time of 56.64 us
+ * * 24 pulses of 423.75 kHz (fc/32)
+ * * A logic 1, which starts with an unmodulated time of 18.88us
+ * followed by 8 pulses of 423.75kHz (fc/32)
+ *
+ * EOF comprises 3 parts:
+ * - A logic 0 (which starts with 8 pulses of fc/32 followed by an unmodulated
+ * time of 18.88us.
+ * - 24 pulses of fc/32
+ * - An unmodulated time of 56.64 us
+ *
+ * A logic 0 starts with 8 pulses of fc/32
+ * followed by an unmodulated time of 256/fc (~18,88us).
+ *
+ * A logic 0 starts with unmodulated time of 256/fc (~18,88us) followed by
+ * 8 pulses of fc/32 (also 18.88us)
+ *
+ * A bit here becomes 8 pulses of fc/32. Therefore:
+ * The SOF can be written as 00011101 = 0x1D
+ * The EOF can be written as 10111000 = 0xb8
+ * A logic 1 is 01
+ * A logic 0 is 10
+ *
+ * */
+
ToSendReset();
// SOF
- ToSendStuffBit(0);
- ToSendStuffBit(0);
- ToSendStuffBit(0);
- ToSendStuffBit(1);
- ToSendStuffBit(1);
- ToSendStuffBit(1);
- ToSendStuffBit(0);
- ToSendStuffBit(1);
+ ToSend[++ToSendMax] = 0x1D; // 00011101
// data
- for(int i = 0; i < n; i++) {
+ for(int i = 0; i < len; i++) {
for(int j = 0; j < 8; j++) {
if ((cmd[i] >> j) & 0x01) {
ToSendStuffBit(0);
}
// EOF
- ToSendStuffBit(1);
- ToSendStuffBit(0);
- ToSendStuffBit(1);
- ToSendStuffBit(1);
- ToSendStuffBit(1);
- ToSendStuffBit(0);
- ToSendStuffBit(0);
- ToSendStuffBit(0);
+ ToSend[++ToSendMax] = 0xB8; // 10111000
ToSendMax++;
}
//-----------------------------------------------------------------------------
// Transmit the tag response (to the reader) that was placed in cmd[].
//-----------------------------------------------------------------------------
-static void TransmitTo15693Reader(const uint8_t *cmd, size_t len, uint32_t start_time, bool slow)
-{
+void TransmitTo15693Reader(const uint8_t *cmd, size_t len, uint32_t start_time, bool slow) {
// don't use the FPGA_HF_SIMULATOR_MODULATE_424K_8BIT minor mode. It would spoil GetCountSspClk()
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_424K);
uint8_t shift_delay = start_time & 0x00000007;
- uint8_t bitmask = 0x00;
- for (int i = 0; i < shift_delay; i++) {
- bitmask |= (0x01 << i);
- }
while (GetCountSspClk() < (start_time & 0xfffffff8)) ;
- AT91C_BASE_SSC->SSC_THR = 0x00; // clear TXRDY
-
LED_C_ON();
uint8_t bits_to_shift = 0x00;
- for(size_t c = 0; c <= len; c++) {
- uint8_t bits_to_send = bits_to_shift << (8 - shift_delay) | (c==len?0x00:cmd[c]) >> shift_delay;
- bits_to_shift = cmd[c] & bitmask;
+ uint8_t bits_to_send = 0x00;
+ for(size_t c = 0; c < len; c++) {
for (int i = 7; i >= 0; i--) {
+ uint8_t cmd_bits = ((cmd[c] >> i) & 0x01) ? 0xff : 0x00;
for (int j = 0; j < (slow?4:1); ) {
+ bits_to_send = bits_to_shift << (8 - shift_delay) | cmd_bits >> shift_delay;
+ bits_to_shift = cmd_bits;
if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
- if (bits_to_send >> i & 0x01) {
- AT91C_BASE_SSC->SSC_THR = 0xff;
- } else {
- AT91C_BASE_SSC->SSC_THR = 0x00;
- }
+ AT91C_BASE_SSC->SSC_THR = bits_to_send;
j++;
}
- WDT_HIT();
}
}
+ WDT_HIT();
}
+ // send the remaining bits, padded with 0:
+ bits_to_send = bits_to_shift << (8 - shift_delay);
+ for ( ; ; ) {
+ if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
+ AT91C_BASE_SSC->SSC_THR = bits_to_send;
+ break;
+ }
+ }
LED_C_OFF();
+
}
static int inline __attribute__((always_inline)) Handle15693SampleFromReader(uint8_t bit, DecodeReader_t *restrict DecodeReader)
{
- switch(DecodeReader->state) {
+ switch (DecodeReader->state) {
case STATE_READER_UNSYNCD:
- if(!bit) {
+ if (!bit) {
// we went low, so this could be the beginning of a SOF
DecodeReader->posCount = 1;
DecodeReader->state = STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF;
case STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF:
DecodeReader->posCount++;
- if(bit) { // detected rising edge
- if(DecodeReader->posCount < 4) { // rising edge too early (nominally expected at 5)
+ if (bit) { // detected rising edge
+ if (DecodeReader->posCount < 4) { // rising edge too early (nominally expected at 5)
DecodeReaderReset(DecodeReader);
} else { // SOF
DecodeReader->state = STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF;
}
} else {
- if(DecodeReader->posCount > 5) { // stayed low for too long
+ if (DecodeReader->posCount > 5) { // stayed low for too long
DecodeReaderReset(DecodeReader);
} else {
// do nothing, keep waiting
case STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF:
DecodeReader->posCount++;
- if(!bit) { // detected a falling edge
+ if (!bit) { // detected a falling edge
if (DecodeReader->posCount < 20) { // falling edge too early (nominally expected at 21 earliest)
DecodeReaderReset(DecodeReader);
} else if (DecodeReader->posCount < 23) { // SOF for 1 out of 4 coding
DecodeReader->state = STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF;
}
} else {
- if(DecodeReader->posCount > 29) { // stayed high for too long
+ if (DecodeReader->posCount > 29) { // stayed high for too long
DecodeReaderReset(DecodeReader);
} else {
// do nothing, keep waiting
// Receive a command (from the reader to us, where we are the simulated tag),
// and store it in the given buffer, up to the given maximum length. Keeps
// spinning, waiting for a well-framed command, until either we get one
-// (returns true) or someone presses the pushbutton on the board (false).
+// (returns len) or someone presses the pushbutton on the board (returns -1).
//
// Assume that we're called with the SSC (to the FPGA) and ADC path set
// correctly.
//-----------------------------------------------------------------------------
-static int GetIso15693CommandFromReader(uint8_t *received, size_t max_len, uint32_t *eof_time)
-{
+int GetIso15693CommandFromReader(uint8_t *received, size_t max_len, uint32_t *eof_time) {
int samples = 0;
bool gotFrame = false;
uint8_t b;
- uint8_t *dmaBuf = BigBuf_malloc(ISO15693_DMA_BUFFER_SIZE);
+ uint8_t dmaBuf[ISO15693_DMA_BUFFER_SIZE];
// the decoder data structure
DecodeReader_t DecodeReader = {0};
(void) temp;
while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)) ;
- uint32_t bit_time = GetCountSspClk() & 0xfffffff8;
+ uint32_t dma_start_time = GetCountSspClk() & 0xfffffff8;
// Setup and start DMA.
FpgaSetupSscDma(dmaBuf, ISO15693_DMA_BUFFER_SIZE);
uint8_t *upTo = dmaBuf;
- for(;;) {
+ for (;;) {
uint16_t behindBy = ((uint8_t*)AT91C_BASE_PDC_SSC->PDC_RPR - upTo) & (ISO15693_DMA_BUFFER_SIZE-1);
if (behindBy == 0) continue;
b = *upTo++;
- if(upTo >= dmaBuf + ISO15693_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
+ if (upTo >= dmaBuf + ISO15693_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
upTo = dmaBuf; // start reading the circular buffer from the beginning
- if(behindBy > (9*ISO15693_DMA_BUFFER_SIZE/10)) {
+ if (behindBy > (9*ISO15693_DMA_BUFFER_SIZE/10)) {
Dbprintf("About to blow circular buffer - aborted! behindBy=%d", behindBy);
break;
}
for (int i = 7; i >= 0; i--) {
if (Handle15693SampleFromReader((b >> i) & 0x01, &DecodeReader)) {
- *eof_time = bit_time + samples - DELAY_READER_TO_ARM_SIM; // end of EOF
+ *eof_time = dma_start_time + samples - DELAY_READER_TO_ARM_SIM; // end of EOF
gotFrame = true;
break;
}
}
if (BUTTON_PRESS()) {
- DecodeReader.byteCount = 0;
+ DecodeReader.byteCount = -1;
break;
}
WDT_HIT();
}
-
FpgaDisableSscDma();
- BigBuf_free_keep_EM();
if (DEBUG) Dbprintf("samples = %d, gotFrame = %d, Decoder: state = %d, len = %d, bitCount = %d, posCount = %d",
samples, gotFrame, DecodeReader.state, DecodeReader.byteCount, DecodeReader.bitCount, DecodeReader.posCount);
if (DecodeReader.byteCount > 0) {
- LogTrace(DecodeReader.output, DecodeReader.byteCount, 0, *eof_time, NULL, true);
+ uint32_t sof_time = *eof_time
+ - DecodeReader.byteCount * (DecodeReader.Coding==CODING_1_OUT_OF_4?128:2048) // time for byte transfers
+ - 32 // time for SOF transfer
+ - 16; // time for EOF transfer
+ LogTrace(DecodeReader.output, DecodeReader.byteCount, sof_time, *eof_time, NULL, true);
}
return DecodeReader.byteCount;
// no mask
cmd[2] = 0x00;
//Now the CRC
- crc = Crc(cmd, 3);
+ crc = Iso15693Crc(cmd, 3);
cmd[3] = crc & 0xff;
cmd[4] = crc >> 8;
// Block number to read
cmd[10] = blockNumber;
//Now the CRC
- crc = Crc(cmd, 11); // the crc needs to be calculated over 11 bytes
+ crc = Iso15693Crc(cmd, 11); // the crc needs to be calculated over 11 bytes
cmd[11] = crc & 0xff;
cmd[12] = crc >> 8;
cmd[8] = uid[1]; //0x05;
cmd[9] = uid[0]; //0xe0;
//Now the CRC
- crc = Crc(cmd, 10);
+ crc = Iso15693Crc(cmd, 10);
cmd[10] = crc & 0xff;
cmd[11] = crc >> 8;
strncat(status,"NoErr ", DBD15STATLEN);
}
- crc=Crc(d,len-2);
+ crc=Iso15693Crc(d,len-2);
if ( (( crc & 0xff ) == d[len-2]) && (( crc >> 8 ) == d[len-1]) )
strncat(status,"CrcOK",DBD15STATLEN);
else
data[0] = ISO15693_REQ_DATARATE_HIGH | ISO15693_REQ_INVENTORY | ISO15693_REQINV_SLOT1;
data[1] = ISO15693_INVENTORY;
data[2] = 0; // mask length
- datalen = AddCrc(data,3);
+ datalen = Iso15693AddCrc(data,3);
recvlen = SendDataTag(data, datalen, false, speed, recv, sizeof(recv), 0);
uint32_t start_time = GetCountSspClk() + DELAY_ISO15693_VICC_TO_VCD_READER;
WDT_HIT();
if (recvlen>=12) {
- Dbprintf("NoAFI UID=%s", sprintUID(NULL, &recv[2]));
+ Dbprintf("NoAFI UID=%s", Iso15693sprintUID(NULL, &recv[2]));
}
// now with AFI
for (int i = 0; i < 256; i++) {
data[2] = i & 0xFF;
- datalen = AddCrc(data,4);
+ datalen = Iso15693AddCrc(data,4);
recvlen = SendDataTag(data, datalen, false, speed, recv, sizeof(recv), start_time);
start_time = GetCountSspClk() + DELAY_ISO15693_VICC_TO_VCD_READER;
WDT_HIT();
if (recvlen >= 12) {
- Dbprintf("AFI=%i UID=%s", i, sprintUID(NULL, &recv[2]));
+ Dbprintf("AFI=%i UID=%s", i, Iso15693sprintUID(NULL, &recv[2]));
}
}
Dbprintf("AFI Bruteforcing done.");
for (int i=0; i<4; i++) {
// Add the CRC
- crc = Crc(cmd[i], 7);
+ crc = Iso15693Crc(cmd[i], 7);
cmd[i][7] = crc & 0xff;
cmd[i][8] = crc >> 8;
cmd[8] = 0x05;
cmd[9]= 0xe0; // always e0 (not exactly unique)
//Now the CRC
- crc = Crc(cmd, 10); // the crc needs to be calculated over 2 bytes
+ crc = Iso15693Crc(cmd, 10); // the crc needs to be calculated over 2 bytes
cmd[10] = crc & 0xff;
cmd[11] = crc >> 8;
// Number of Blocks to read
cmd[11] = 0x2f; // read quite a few
//Now the CRC
- crc = Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
+ crc = Iso15693Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
cmd[12] = crc & 0xff;
cmd[13] = crc >> 8;
// cmd[12] = 0x00;
// cmd[13] = 0x00; //Now the CRC
- crc = Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
+ crc = Iso15693Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
cmd[12] = crc & 0xff;
cmd[13] = crc >> 8;
// cmd[12] = 0x00;
// cmd[13] = 0x00; //Now the CRC
- crc = Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
+ crc = Iso15693Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
cmd[12] = crc & 0xff;
cmd[13] = crc >> 8;
// Routines to support ISO 15693.
//-----------------------------------------------------------------------------
-#ifndef __ISO15693_H
-#define __ISO15693_H
+#ifndef ISO15693_H__
+#define ISO15693_H__
#include <stdint.h>
+#include <stddef.h>
+#include <stdbool.h>
+// Delays in SSP_CLK ticks.
+// SSP_CLK runs at 13,56MHz / 32 = 423.75kHz when simulating a tag
+#define DELAY_READER_TO_ARM_SIM 8
+#define DELAY_ARM_TO_READER_SIM 1
+#define DELAY_ISO15693_VCD_TO_VICC_SIM 132 // 132/423.75kHz = 311.5us from end of command EOF to start of tag response
+//SSP_CLK runs at 13.56MHz / 4 = 3,39MHz when acting as reader
+#define DELAY_ISO15693_VCD_TO_VICC_READER 1056 // 1056/3,39MHz = 311.5us from end of command EOF to start of tag response
+#define DELAY_ISO15693_VICC_TO_VCD_READER 1017 // 1017/3.39MHz = 300us between end of tag response and next reader command
+
+void CodeIso15693AsTag(uint8_t *cmd, size_t len);
+int GetIso15693CommandFromReader(uint8_t *received, size_t max_len, uint32_t *eof_time);
+void TransmitTo15693Reader(const uint8_t *cmd, size_t len, uint32_t start_time, bool slow);
void SnoopIso15693(void);
void AcquireRawAdcSamplesIso15693(void);
void ReaderIso15693(uint32_t parameter);
void SimTagIso15693(uint32_t parameter, uint8_t *uid);
void BruteforceIso15693Afi(uint32_t speed);
-void DirectTag15693Command(uint32_t datalen,uint32_t speed, uint32_t recv, uint8_t data[]);
+void DirectTag15693Command(uint32_t datalen, uint32_t speed, uint32_t recv, uint8_t data[]);
void SetTag15693Uid(uint8_t *uid);
void SetDebugIso15693(uint32_t flag);
}
-void annotateIclass(char *exp, size_t size, uint8_t* cmd, uint8_t cmdsize)
-{
+void annotateIclass(char *exp, size_t size, uint8_t* cmd, uint8_t cmdsize) {
switch(cmd[0])
{
- case ICLASS_CMD_ACTALL: snprintf(exp,size,"ACTALL"); break;
- case ICLASS_CMD_READ_OR_IDENTIFY:{
- if(cmdsize > 1){
+ case ICLASS_CMD_ACTALL: snprintf(exp, size, "ACTALL"); break;
+ case ICLASS_CMD_READ_OR_IDENTIFY: {
+ if (cmdsize > 1){
snprintf(exp,size,"READ(%d)",cmd[1]);
- }else{
+ } else {
snprintf(exp,size,"IDENTIFY");
}
break;
}
- case ICLASS_CMD_SELECT: snprintf(exp,size,"SELECT"); break;
- case ICLASS_CMD_PAGESEL: snprintf(exp,size,"PAGESEL(%d)", cmd[1]); break;
- case ICLASS_CMD_READCHECK_KC:snprintf(exp,size,"READCHECK[Kc](%d)", cmd[1]); break;
- case ICLASS_CMD_READCHECK_KD:snprintf(exp,size,"READCHECK[Kd](%d)", cmd[1]); break;
- case ICLASS_CMD_CHECK: snprintf(exp,size,"CHECK"); break;
- case ICLASS_CMD_DETECT: snprintf(exp,size,"DETECT"); break;
- case ICLASS_CMD_HALT: snprintf(exp,size,"HALT"); break;
- case ICLASS_CMD_UPDATE: snprintf(exp,size,"UPDATE(%d)",cmd[1]); break;
- case ICLASS_CMD_ACT: snprintf(exp,size,"ACT"); break;
- case ICLASS_CMD_READ4: snprintf(exp,size,"READ4(%d)",cmd[1]); break;
- default: snprintf(exp,size,"?"); break;
+ case ICLASS_CMD_SELECT: snprintf(exp,size, "SELECT"); break;
+ case ICLASS_CMD_PAGESEL: snprintf(exp,size, "PAGESEL(%d)", cmd[1]); break;
+ case ICLASS_CMD_READCHECK_KC:snprintf(exp,size, "READCHECK[Kc](%d)", cmd[1]); break;
+ case ICLASS_CMD_READCHECK_KD:snprintf(exp,size, "READCHECK[Kd](%d)", cmd[1]); break;
+ case ICLASS_CMD_CHECK: snprintf(exp,size, "CHECK"); break;
+ case ICLASS_CMD_DETECT: snprintf(exp,size, "DETECT"); break;
+ case ICLASS_CMD_HALT: snprintf(exp,size, "HALT"); break;
+ case ICLASS_CMD_UPDATE: snprintf(exp,size, "UPDATE(%d)",cmd[1]); break;
+ case ICLASS_CMD_ACT: snprintf(exp,size, "ACT"); break;
+ case ICLASS_CMD_READ4: snprintf(exp,size, "READ4(%d)",cmd[1]); break;
+ default: snprintf(exp,size, "?"); break;
}
return;
}
}
}
+ // adjust for different time scales
+ if (protocol == ICLASS || protocol == ISO_15693) {
+ first_timestamp *= 32;
+ timestamp *= 32;
+ duration *= 32;
+ }
+
//Check the CRC status
uint8_t crcStatus = 2;
uint8_t parityBits = parityBytes[j>>3];
if (protocol != ISO_14443B
&& protocol != ISO_15693
+ && protocol != ICLASS
&& protocol != ISO_7816_4
&& (isResponse || protocol == ISO_14443A)
&& (oddparity8(frame[j]) != ((parityBits >> (7-(j&0x0007))) & 0x01))) {
}
if (markCRCBytes) {
- if(crcStatus == 0 || crcStatus == 1)
- {//CRC-command
+ if (crcStatus == 0 || crcStatus == 1) { //CRC-command
char *pos1 = line[(data_len-2)/16]+(((data_len-2) % 16) * 4);
(*pos1) = '[';
char *pos2 = line[(data_len)/16]+(((data_len) % 16) * 4);
if (protocol == PROTO_MIFARE)
annotateMifare(explanation, sizeof(explanation), frame, data_len, parityBytes, parity_len, isResponse);
- if(!isResponse)
- {
+ if (!isResponse) {
switch(protocol) {
case ICLASS: annotateIclass(explanation,sizeof(explanation),frame,data_len); break;
case ISO_14443A: annotateIso14443a(explanation,sizeof(explanation),frame,data_len); break;
if (showWaitCycles && !isResponse && next_record_is_response(tracepos, trace)) {
uint32_t next_timestamp = *((uint32_t *)(trace + tracepos));
+ // adjust for different time scales
+ if (protocol == ICLASS || protocol == ISO_15693) {
+ next_timestamp *= 32;
+ }
+
PrintAndLog(" %10d | %10d | %s | fdt (Frame Delay Time): %d",
(EndOfTransmissionTimestamp - first_timestamp),
(next_timestamp - first_timestamp),
// ISO15693 commons
// Adrian Dabrowski 2010 and others, GPLv2
-#ifndef ISO15693_H__
-#define ISO15693_H__
+#ifndef ISO15693TOOLS_H__
+#define ISO15693TOOLS_H__
// ISO15693 CRC
#define ISO15693_CRC_PRESET (uint16_t)0xFFFF
uint16_t Iso15693Crc(uint8_t *v, int n);
int Iso15693AddCrc(uint8_t *req, int n);
-char* Iso15693sprintUID(char *target,uint8_t *uid);
+char* Iso15693sprintUID(char *target, uint8_t *uid);
unsigned short iclass_crc16(char *data_p, unsigned short length);
#endif
projects / proxmark3-svn / commitdiff