if (triggered)
LogTrace(Uart.output, Uart.byteCnt, time_start, time_stop, NULL, TRUE);
- /* And ready to receive another command. */
- UartReset();
- /* And also reset the demod code, which might have been */
- /* false-triggered by the commands from the reader. */
- DemodReset();
+ /* And ready to receive another command. */
+ UartReset();
+ /* And also reset the demod code, which might have been */
+ /* false-triggered by the commands from the reader. */
+ DemodReset();
} else {
time_start = GetCountSspClk() - time_0;
}
//FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD);
}
-}
\ No newline at end of file
+}
// Wait until flashing of page finishes
uint32_t sr;
while(!((sr = AT91C_BASE_EFC0->EFC_FSR) & AT91C_MC_FRDY));
- if(sr & (AT91C_MC_LOCKE | AT91C_MC_PROGE)) {
- dont_ack = 1;
- cmd_send(CMD_NACK,sr,0,0,0,0);
- }
+ if(sr & (AT91C_MC_LOCKE | AT91C_MC_PROGE)) {
+ dont_ack = 1;
+ cmd_send(CMD_NACK,sr,0,0,0,0);
+ }
}
} break;
case 3: if (BitStream[j]==1) return 0; break; //should be 0 spacer bit
case 2: if (BitStream[j]==0) return 0; break; //should be 1 spacer bit
default: //test parity
- if (parityTest(parityWd, pLen, pType) == 0) return 0; break;
+ if (parityTest(parityWd, pLen, pType) == 0)
+ return 0;
+ break;
}
bitCnt+=(pLen-1);
parityWd = 0;