ADD: @marshmellow 14b changes.
fix: fixes to the timing inside iso14443b.c sniff/sending. Between TX & RX there should be a 151us pause.
## [Unreleased][unreleased]
+### Changed
+- Changed lf config's `threshold` to a graph (signed) metric and it will trigger on + or - value set to. (example: set to 50 and recording would begin at first graphed value of >= 50 or <= -50) (marshmellow)
+- Changed `hf 14b write` to `hf 14b sriwrite` as it only applied to sri tags (marshmellow)
+- Added `hf 14b reader` to `hf search` (marshmellow)
+
### Added
+- Add `hf 14b reader` to find and print general info about known 14b tags (marshmellow)
+- Add `hf 14b info` to find and print full info about std 14b tags and sri tags (using 14b raw commands in the client) (marshmellow)
- Add PACE replay functionality (frederikmoellers)
### Fixed
}
void clear_trace() {
- uint8_t *trace = BigBuf_get_addr();
- uint16_t max_traceLen = BigBuf_max_traceLen();
- memset(trace, 0x44, max_traceLen);
traceLen = 0;
}
traceLen += iLen;
// parity bytes
- if (iLen != 0) {
- if (parity != NULL) {
+ if (parity != NULL && iLen != 0) {
memcpy(trace + traceLen, parity, num_paritybytes);
- } else {
- memset(trace + traceLen, 0x00, num_paritybytes);
- }
}
traceLen += num_paritybytes;
return TRUE;
}
-
-
// Emulator memory
uint8_t emlSet(uint8_t *data, uint32_t offset, uint32_t length){
uint8_t* mem = BigBuf_get_EM_addr();
}
inflateEnd(&compressed_fpga_stream);
+
+ BigBuf_free();
}
// (c) 2012 Roel Verdult
//-----------------------------------------------------------------------------
-#include "../include/proxmark3.h"
+#include "proxmark3.h"
#include "apps.h"
#include "util.h"
-#include "../include/hitag2.h"
+#include "hitag2.h"
#include "string.h"
#include "BigBuf.h"
byte_t rx[HITAG_FRAME_LEN];
size_t rxlen=0;
+ FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+
+ // Clean up trace and prepare it for storing frames
+ set_tracing(TRUE);
+ clear_trace();
+
auth_table_len = 0;
auth_table_pos = 0;
+
BigBuf_free();
auth_table = (byte_t *)BigBuf_malloc(AUTH_TABLE_LENGTH);
memset(auth_table, 0x00, AUTH_TABLE_LENGTH);
-
- // Clean up trace and prepare it for storing frames
- set_tracing(TRUE);
- clear_trace();
DbpString("Starting Hitag2 snoop");
LED_D_ON();
// Set up eavesdropping mode, frequency divisor which will drive the FPGA
// and analog mux selection.
- FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_TOGGLE_MODE);
FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
bool bQuitTraceFull = false;
bQuiet = false;
+ FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+
+ // Clean up trace and prepare it for storing frames
+ set_tracing(TRUE);
+ clear_trace();
+
auth_table_len = 0;
auth_table_pos = 0;
byte_t* auth_table;
auth_table = (byte_t *)BigBuf_malloc(AUTH_TABLE_LENGTH);
memset(auth_table, 0x00, AUTH_TABLE_LENGTH);
- // Clean up trace and prepare it for storing frames
- set_tracing(TRUE);
- clear_trace();
-
DbpString("Starting Hitag2 simulation");
LED_D_ON();
hitag2_init();
// Set up simulator mode, frequency divisor which will drive the FPGA
// and analog mux selection.
- FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_READER_FIELD);
FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
//
//-----------------------------------------------------------------------------
-#include "../include/proxmark3.h"
+#include "proxmark3.h"
#include "apps.h"
#include "util.h"
#include "string.h"
// Needed for CRC in emulation mode;
// same construction as in ISO 14443;
// different initial value (CRC_ICLASS)
-#include "../common/iso14443crc.h"
-#include "../common/iso15693tools.h"
-//#include "iso15693tools.h"
+#include "iso14443crc.h"
+#include "iso15693tools.h"
#include "protocols.h"
#include "optimized_cipher.h"
//-----------------------------------------------------------------------------
void RAMFUNC SnoopIClass(void)
{
+
+
// We won't start recording the frames that we acquire until we trigger;
// a good trigger condition to get started is probably when we see a
// response from the tag.
int resp_cc_len;
uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
- memset(receivedCmd, 0x44, MAX_FRAME_SIZE);
int len;
// Prepare card messages
}
}
- memset(receivedCmd, 0x44, MAX_FRAME_SIZE);
}
//Dbprintf("%x", cmdsRecvd);
LEDsoff();
- // We won't start recording the frames that we acquire until we trigger;
- // a good trigger condition to get started is probably when we see a
- // response from the tag.
- // triggered == FALSE -- to wait first for card
- bool triggered = !(param & 0x03);
+
+ iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
// Allocate memory from BigBuf for some buffers
// free all previous allocations first
bool TagIsActive = FALSE;
bool ReaderIsActive = FALSE;
- iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
-
// Set up the demodulator for tag -> reader responses.
DemodInit(receivedResponse, receivedResponsePar);
// Setup and start DMA.
FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
+ // We won't start recording the frames that we acquire until we trigger;
+ // a good trigger condition to get started is probably when we see a
+ // response from the tag.
+ // triggered == FALSE -- to wait first for card
+ bool triggered = !(param & 0x03);
+
// And now we loop, receiving samples.
for(uint32_t rsamples = 0; TRUE; ) {
}
/* And ready to receive another command. */
UartReset();
- //UartInit(receivedCmd, receivedCmdPar);
/* And also reset the demod code, which might have been */
/* false-triggered by the commands from the reader. */
DemodReset();
.modulation_n = 0
};
+ // We need to listen to the high-frequency, peak-detected path.
+ iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
+
BigBuf_free_keep_EM();
// allocate buffers:
int happened2 = 0;
int cmdsRecvd = 0;
- // We need to listen to the high-frequency, peak-detected path.
- iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
-
cmdsRecvd = 0;
tag_response_info_t* p_response;
uint8_t receivedAnswer[MAX_MIFARE_FRAME_SIZE];
uint8_t receivedAnswerPar[MAX_MIFARE_PARITY_SIZE];
+ if (first_try) {
+ iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD);
+ }
+
// free eventually allocated BigBuf memory. We want all for tracing.
BigBuf_free();
if (first_try) {
mf_nr_ar3 = 0;
- iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD);
sync_time = GetCountSspClk() & 0xfffffff8;
sync_cycles = 65536; // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces).
nt_attacked = 0;
cmd_send(CMD_ACK,isOK,0,0,buf,28);
- set_tracing(FALSE);
+ // Thats it...
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
LEDsoff();
+
+ set_tracing(FALSE);
}
uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0,0,0};
uint8_t ar_nr_collected = 0;
- // free eventually allocated BigBuf memory but keep Emulator Memory
- BigBuf_free_keep_EM();
-
- // clear trace
- clear_trace();
- set_tracing(TRUE);
-
// Authenticate response - nonce
uint32_t nonce = bytes_to_num(rAUTH_NT, 4);
rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3];
}
- // We need to listen to the high-frequency, peak-detected path.
- iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
-
-
if (MF_DBGLEVEL >= 1) {
if (!_7BUID) {
Dbprintf("4B UID: %02x%02x%02x%02x",
}
}
+ // We need to listen to the high-frequency, peak-detected path.
+ iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
+
+ // free eventually allocated BigBuf memory but keep Emulator Memory
+ BigBuf_free_keep_EM();
+
+ // clear trace
+ clear_trace();
+ set_tracing(TRUE);
+
+
bool finished = FALSE;
while (!BUTTON_PRESS() && !finished) {
WDT_HIT();
// bit 0 - trigger from first card answer
// bit 1 - trigger from first reader 7-bit request
- // free eventually allocated BigBuf memory
- BigBuf_free();
-
// C(red) A(yellow) B(green)
LEDsoff();
// init trace buffer
uint8_t receivedResponse[MAX_MIFARE_FRAME_SIZE];
uint8_t receivedResponsePar[MAX_MIFARE_PARITY_SIZE];
+ iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
+
+ // free eventually allocated BigBuf memory
+ BigBuf_free();
// allocate the DMA buffer, used to stream samples from the FPGA
uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE);
uint8_t *data = dmaBuf;
bool ReaderIsActive = FALSE;
bool TagIsActive = FALSE;
- iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
-
// Set up the demodulator for tag -> reader responses.
DemodInit(receivedResponse, receivedResponsePar);
if (MfSniffLogic(receivedCmd, Uart.len, Uart.parity, Uart.bitCount, TRUE)) break;
/* And ready to receive another command. */
- //UartInit(receivedCmd, receivedCmdPar);
UartReset();
/* And also reset the demod code */
//-----------------------------------------------------------------------------
void SimulateIso14443bTag(void)
{
- FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
- BigBuf_free();
-
// the only commands we understand is REQB, AFI=0, Select All, N=0:
static const uint8_t cmd1[] = { 0x05, 0x00, 0x08, 0x39, 0x73 };
// ... and REQB, AFI=0, Normal Request, N=0:
0x00, 0x21, 0x85, 0x5e, 0xd7
};
+ uint8_t parity[MAX_PARITY_SIZE];
+
+ FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
+
clear_trace();
set_tracing(TRUE);
const uint8_t *resp;
uint8_t *respCode;
uint16_t respLen, respCodeLen;
- uint16_t len;
- uint16_t cmdsRecvd = 0;
-
// allocate command receive buffer
+ BigBuf_free();
uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
+ uint16_t len;
+ uint16_t cmdsRecvd = 0;
+
// prepare the (only one) tag answer:
CodeIso14443bAsTag(response1, sizeof(response1));
-
uint8_t *resp1Code = BigBuf_malloc(ToSendMax);
memcpy(resp1Code, ToSend, ToSendMax);
uint16_t resp1CodeLen = ToSendMax;
}
if (tracing) {
- uint8_t parity[MAX_PARITY_SIZE];
LogTrace(receivedCmd, len, 0, 0, parity, TRUE);
}
}
// trace the response:
- if (tracing) {
- uint8_t parity[MAX_PARITY_SIZE];
- LogTrace(resp, respLen, 0, 0, parity, FALSE);
- }
-
+ if (tracing) LogTrace(resp, respLen, 0, 0, parity, FALSE);
}
+ //FpgaDisableSscDma();
}
//=============================================================================
BigBuf_free();
// The response (tag -> reader) that we're receiving.
- uint8_t *receivedResponse = BigBuf_malloc(MAX_FRAME_SIZE);
+ uint8_t *resp = BigBuf_malloc(MAX_FRAME_SIZE);
// The DMA buffer, used to stream samples from the FPGA
int8_t *dmaBuf = (int8_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE);
// Set up the demodulator for tag -> reader responses.
- DemodInit(receivedResponse);
+ DemodInit(resp);
// Setup and start DMA.
FpgaSetupSscDma((uint8_t*) dmaBuf, ISO14443B_DMA_BUFFER_SIZE);
LED_D_ON();
// And put the FPGA in the appropriate mode
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ);
+ SpinDelayUs(151); // T0 time between reader send, tag answer. 151us.
for(;;) {
int behindBy = lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR;
void ReadSTMemoryIso14443b(uint32_t dwLast)
{
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
-
+ BigBuf_free();
+
clear_trace();
set_tracing(TRUE);
// confusing things will happen if we don't reset them between reads.
LED_D_OFF();
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+ SpinDelay(200);
+
SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
FpgaSetupSsc();
//Use samples as a time measurement
if(tracing)
{
- uint8_t parity[MAX_PARITY_SIZE];
- LogTrace(Demod.output, Demod.len, samples, samples, parity, FALSE);
+ //uint8_t parity[MAX_PARITY_SIZE];
+ LogTrace(Demod.output, Demod.len, samples, samples, parity, FALSE);
}
triggered = TRUE;
SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
FpgaSetupSsc();
- set_tracing(TRUE);
-
- CodeAndTransmit14443bAsReader(data, datalen);
+ if ( datalen == 0 && recv == 0 && powerfield == 0){
+ clear_trace();
+ } else {
+ set_tracing(TRUE);
+ CodeAndTransmit14443bAsReader(data, datalen);
+ }
if(recv) {
GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
LED_D_OFF();
}
+
+ FpgaDisableSscDma();
}
LED_C_OFF();
LED_D_OFF();
+ if (init) Iso15693InitReader();
+
int answerLen=0;
uint8_t *answer = BigBuf_get_addr() + 3660;
if (recv != NULL) memset(answer, 0, 100);
- if (init) Iso15693InitReader();
-
if (!speed) {
// low speed (1 out of 256)
CodeIso15693AsReader256(send, sendlen);
LED_C_OFF();
LED_D_OFF();
- uint8_t *answer1 = BigBuf_get_addr() + 3660;
- uint8_t *answer2 = BigBuf_get_addr() + 3760;
- uint8_t *answer3 = BigBuf_get_addr() + 3860;
-
int answerLen1 = 0;
int answerLen2 = 0;
int answerLen3 = 0;
int elapsed = 0;
uint8_t TagUID[8] = {0x00};
+ FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
+ uint8_t *answer1 = BigBuf_get_addr() + 3660;
+ uint8_t *answer2 = BigBuf_get_addr() + 3760;
+ uint8_t *answer3 = BigBuf_get_addr() + 3860;
// Blank arrays
memset(answer1, 0x00, 300);
- FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
-
SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
// Setup SSC
FpgaSetupSsc();
LED_C_OFF();
LED_D_OFF();
- uint8_t *buf = BigBuf_get_addr() + 3660;
-
int answerLen1 = 0;
int samples = 0;
int tsamples = 0;
int wait = 0;
int elapsed = 0;
- memset(buf, 0x00, 100);
-
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
- SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
+ uint8_t *buf = BigBuf_get_addr() + 3660;
+ memset(buf, 0x00, 100);
+ SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
FpgaSetupSsc();
// Start from off (no field generated)
* @param silent - is true, now outputs are made. If false, dbprints the status
* @return the number of bits occupied by the samples.
*/
-
uint32_t DoAcquisition(uint8_t decimation, uint32_t bits_per_sample, bool averaging, int trigger_threshold,bool silent)
{
//.
if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
sample = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
LED_D_OFF();
- if (trigger_threshold > 0 && sample < trigger_threshold)
+ // threshold either high or low values 128 = center 0. if trigger = 178
+ if ((trigger_threshold > 0) && (sample < (trigger_threshold+128)) && (sample > (128-trigger_threshold))) //
continue;
trigger_threshold = 0;
struct Crypto1State *pcs;\r
pcs = &mpcs;\r
\r
- // clear trace\r
- clear_trace();\r
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);\r
\r
+ clear_trace();\r
+\r
LED_A_ON();\r
LED_B_OFF();\r
LED_C_OFF();\r
bool turnOffField = (arg0 == 1);\r
\r
LED_A_ON(); LED_B_OFF(); LED_C_OFF();\r
- clear_trace();\r
+\r
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);\r
\r
+ clear_trace();\r
+\r
if(!iso14443a_select_card(NULL, NULL, NULL)) {\r
if (MF_DBGLEVEL >= MF_DBG_ERROR) Dbprintf("Can't select card");\r
OnError(0);\r
\r
LEDsoff();\r
LED_A_ON();\r
- clear_trace();\r
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);\r
\r
+ clear_trace();\r
+\r
int len = iso14443a_select_card(NULL, NULL, NULL);\r
if(!len) {\r
if (MF_DBGLEVEL >= MF_DBG_ERROR) Dbprintf("Can't select card (RC:%02X)",len);\r
struct Crypto1State *pcs;\r
pcs = &mpcs;\r
\r
- // clear trace\r
- clear_trace();\r
-\r
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);\r
\r
+ clear_trace();\r
+\r
LED_A_ON();\r
LED_B_OFF();\r
LED_C_OFF();\r
// datain = KEY bytes\r
void MifareUReadCard(uint8_t arg0, uint16_t arg1, uint8_t arg2, uint8_t *datain)\r
{\r
+ LEDsoff();\r
+ LED_A_ON();\r
+ iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);\r
+\r
// free eventually allocated BigBuf memory\r
BigBuf_free();\r
clear_trace();\r
return;\r
}\r
\r
- LEDsoff();\r
- LED_A_ON();\r
- iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);\r
-\r
int len = iso14443a_select_card(NULL, NULL, NULL);\r
if (!len) {\r
if (MF_DBGLEVEL >= MF_DBG_ERROR) Dbprintf("Can't select card (RC:%d)",len);\r
struct Crypto1State *pcs;\r
pcs = &mpcs;\r
\r
- // clear trace\r
- clear_trace();\r
-\r
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);\r
\r
+ clear_trace();\r
+\r
LED_A_ON();\r
LED_B_OFF();\r
LED_C_OFF();\r
\r
LEDsoff();\r
LED_A_ON();\r
- clear_trace();\r
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);\r
\r
+ clear_trace();\r
+\r
if(!iso14443a_select_card(NULL, NULL, NULL)) {\r
if (MF_DBGLEVEL >= 1) Dbprintf("Can't select card");\r
OnError(0);\r
memcpy(pwd, datain, 16);\r
\r
LED_A_ON(); LED_B_OFF(); LED_C_OFF();\r
- clear_trace();\r
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);\r
\r
+ clear_trace();\r
+\r
if(!iso14443a_select_card(NULL, NULL, NULL)) {\r
if (MF_DBGLEVEL >= 1) Dbprintf("Can't select card");\r
OnError(0);\r
uint32_t auth1_time, auth2_time;\r
static uint16_t delta_time;\r
\r
+ LED_A_ON();\r
+ LED_C_OFF();\r
+ iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);\r
+\r
// free eventually allocated BigBuf memory\r
BigBuf_free();\r
- // clear trace\r
+\r
clear_trace();\r
set_tracing(false);\r
- \r
- iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);\r
-\r
- LED_A_ON();\r
- LED_C_OFF();\r
-\r
\r
// statistics on nonce distance\r
int16_t isOK = 0;\r
int OLD_MF_DBGLEVEL = MF_DBGLEVEL; \r
MF_DBGLEVEL = MF_DBG_NONE;\r
\r
- // clear trace\r
- clear_trace();\r
- set_tracing(TRUE);\r
-\r
- iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);\r
-\r
LED_A_ON();\r
LED_B_OFF();\r
LED_C_OFF();\r
+ iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);\r
+\r
+ clear_trace();\r
+ set_tracing(TRUE);\r
\r
for (i = 0; i < keyCount; i++) {\r
if(mifare_classic_halt(pcs, cuid)) {\r
//-----------------------------------------------------------------------------\r
// Work with emulator memory\r
// \r
+// Note: we call FpgaDownloadAndGo(FPGA_BITSTREAM_HF) here although FPGA is not\r
+// involved in dealing with emulator memory. But if it is called later, it might\r
+// destroy the Emulator Memory.\r
//-----------------------------------------------------------------------------\r
+\r
void MifareEMemClr(uint32_t arg0, uint32_t arg1, uint32_t arg2, uint8_t *datain){\r
+ FpgaDownloadAndGo(FPGA_BITSTREAM_HF);\r
emlClearMem();\r
}\r
\r
void MifareEMemSet(uint32_t arg0, uint32_t arg1, uint32_t arg2, uint8_t *datain){\r
+ FpgaDownloadAndGo(FPGA_BITSTREAM_HF);\r
emlSetMem(datain, arg0, arg1); // data, block num, blocks count\r
}\r
\r
void MifareEMemGet(uint32_t arg0, uint32_t arg1, uint32_t arg2, uint8_t *datain){\r
+ FpgaDownloadAndGo(FPGA_BITSTREAM_HF);\r
byte_t buf[USB_CMD_DATA_SIZE];\r
emlGetMem(buf, arg0, arg1); // data, block num, blocks count (max 4)\r
\r
byte_t dataoutbuf2[16];\r
uint8_t uid[10];\r
\r
- // clear trace\r
- clear_trace();\r
- set_tracing(false);\r
- \r
- iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);\r
-\r
LED_A_ON();\r
LED_B_OFF();\r
LED_C_OFF();\r
+ iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);\r
+ \r
+ clear_trace();\r
+ set_tracing(false);\r
\r
bool isOK = true;\r
\r
LED_A_ON();\r
LED_B_OFF();\r
LED_C_OFF();\r
+ iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);\r
\r
clear_trace();\r
set_tracing(TRUE);\r
- iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);\r
}\r
\r
while (true) {\r
LED_A_ON();\r
LED_B_OFF();\r
LED_C_OFF();\r
+ iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);\r
\r
clear_trace();\r
set_tracing(TRUE);\r
- iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);\r
}\r
\r
while (true) {\r
LED_A_ON();\r
LED_B_OFF();\r
LED_C_OFF();\r
-\r
+ \r
+iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);\r
clear_trace();\r
set_tracing(TRUE);\r
- iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);\r
+ \r
\r
for (int i = 0; i < iterations; i++) {\r
\r
uint8_t uid[10] = {0x00};\r
uint32_t cuid = 0x00;\r
\r
- clear_trace();\r
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);\r
+ clear_trace();\r
\r
int len = iso14443a_select_card(uid, NULL, &cuid);\r
if(!len) {\r
//static uint8_t __res[MAX_FRAME_SIZE];
bool InitDesfireCard(){
-
- byte_t cardbuf[USB_CMD_DATA_SIZE] = {0x00};
- iso14a_card_select_t *card = (iso14a_card_select_t*)cardbuf;
-
- set_tracing(TRUE);
iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
+ set_tracing(TRUE);
+
+ byte_t cardbuf[USB_CMD_DATA_SIZE] = {0x00};
+ iso14a_card_select_t *card = (iso14a_card_select_t*)cardbuf;
int len = iso14443a_select_card(NULL,card,NULL);
#include <string.h>
#include <stdbool.h>
#include <stdint.h>
-#include <time.h>
#define opt_T(s) (0x1 & ((s->t >> 15) ^ (s->t >> 14)^ (s->t >> 10)^ (s->t >> 8)^ (s->t >> 5)^ (s->t >> 4)^ (s->t >> 1)^ s->t))