Small changes to some armsrc makefile to allow conditional compilation of various...

diff --git a/armsrc/Makefile b/armsrc/Makefile
index bc15aeb9d568f48a6b8161dde7e06b20d04e4a6e..d73f2e77bc061c9ecb90083b102e67c97a836592 100644 (file)
--- a/armsrc/Makefile
+++ b/armsrc/Makefile
@@ -2,24 +2,29 @@
 \r
 APP_INCLUDES = apps.h\r
 \r
 \r
 APP_INCLUDES = apps.h\r
 \r

-# Add the "-DWITH_LCD" flag in APP_CLFAGS to add support for LCD\r
-# and add SRC_LCD to THUMBSRC\r
-APP_CFLAGS     = -O6\r
+#remove one of the following defines and comment out the relevant line\r
+#in the next section to remove that particular feature from compilation  \r
+APP_CFLAGS     = -O6 -DWITH_ISO15693 -DWITH_ISO14443a -DWITH_ISO14443b\r
+#-DWITH_LCD\r

 \r
 \r

-SRC_LCD = fonts.c LCD.c\r
+#SRC_LCD = fonts.c LCD.c\r
+SRC_ISO15693 = iso15693.c\r
+SRC_ISO14443a = iso14443a.c\r
+SRC_ISO14443b = iso14443.c\r

 \r
 THUMBSRC = start.c \\r
 \r
 THUMBSRC = start.c \\r

+       $(SRC_LCD) \\r
+       $(SRC_ISO15693) \\r

        appmain.c \\r
        lfops.c \\r
        appmain.c \\r
        lfops.c \\r

-       iso15693.c \\r

        util.c \\r
        hitag2.c \\r
        usb.c\r
 \r
 # These are to be compiled in ARM mode\r
        util.c \\r
        hitag2.c \\r
        usb.c\r
 \r
 # These are to be compiled in ARM mode\r

-ARMSRC =  iso14443.c \\r
-       iso14443a.c \\r
-       fpgaloader.c\r
+ARMSRC = fpgaloader.c \\r
+       $(SRC_ISO14443a) \\r
+       $(SRC_ISO14443b)\r

 \r
 # Do not move this inclusion before the definition of {THUMB,ASM,ARM}SRC\r
 include ../common/Makefile.common\r
 \r
 # Do not move this inclusion before the definition of {THUMB,ASM,ARM}SRC\r
 include ../common/Makefile.common\r

diff --git a/armsrc/fpgaloader.c b/armsrc/fpgaloader.c
index 8cea61b0b7005fd51e116a0c43a7d82c964b9eb0..af2f02abaf6df550a9f93d2cf313a868bb16ddf5 100644 (file)
--- a/armsrc/fpgaloader.c
+++ b/armsrc/fpgaloader.c
@@ -152,28 +152,50 @@ static void DownloadFPGA_byte(unsigned char w)
 // If bytereversal is set: reverse the byte order in each 4-byte word\r
 static void DownloadFPGA(const char *FpgaImage, int FpgaImageLen, int bytereversal)\r
 {\r
 // If bytereversal is set: reverse the byte order in each 4-byte word\r
 static void DownloadFPGA(const char *FpgaImage, int FpgaImageLen, int bytereversal)\r
 {\r

-       int i;\r
+       int i=0;\r

 \r
        PIO_OUTPUT_ENABLE = (1 << GPIO_FPGA_ON);\r
        PIO_ENABLE = (1 << GPIO_FPGA_ON);\r
 \r
        PIO_OUTPUT_ENABLE = (1 << GPIO_FPGA_ON);\r
        PIO_ENABLE = (1 << GPIO_FPGA_ON);\r

-       PIO_OUTPUT_DATA_SET = (1 << GPIO_FPGA_ON);\r
+       HIGH(GPIO_FPGA_ON);             // ensure everything is powered on\r

 \r
        SpinDelay(50);\r
 \r
        LED_D_ON();\r
 \r
 \r
        SpinDelay(50);\r
 \r
        LED_D_ON();\r
 \r

+       // These pins are inputs\r
+    PIO_OUTPUT_DISABLE =     (1 << GPIO_FPGA_NINIT) | (1 << GPIO_FPGA_DONE);\r
+       // PIO controls the following pins\r
+    PIO_ENABLE =             (1 << GPIO_FPGA_NINIT) | (1 << GPIO_FPGA_DONE);\r
+       // Enable pull-ups\r
+       PIO_NO_PULL_UP_DISABLE = (1 << GPIO_FPGA_NINIT) | (1 << GPIO_FPGA_DONE);\r
+\r
+       // setup initial logic state\r

        HIGH(GPIO_FPGA_NPROGRAM);\r
        LOW(GPIO_FPGA_CCLK);\r
        LOW(GPIO_FPGA_DIN);\r
        HIGH(GPIO_FPGA_NPROGRAM);\r
        LOW(GPIO_FPGA_CCLK);\r
        LOW(GPIO_FPGA_DIN);\r

+       // These pins are outputs\r

        PIO_OUTPUT_ENABLE = (1 << GPIO_FPGA_NPROGRAM)   |\r
                                                (1 << GPIO_FPGA_CCLK)           |\r
                                                (1 << GPIO_FPGA_DIN);\r
        PIO_OUTPUT_ENABLE = (1 << GPIO_FPGA_NPROGRAM)   |\r
                                                (1 << GPIO_FPGA_CCLK)           |\r
                                                (1 << GPIO_FPGA_DIN);\r

-       SpinDelay(1);\r

 \r
 \r

+       // enter FPGA configuration mode\r

        LOW(GPIO_FPGA_NPROGRAM);\r
        SpinDelay(50);\r
        HIGH(GPIO_FPGA_NPROGRAM);\r
 \r
        LOW(GPIO_FPGA_NPROGRAM);\r
        SpinDelay(50);\r
        HIGH(GPIO_FPGA_NPROGRAM);\r
 \r

+       i=100000;\r
+       // wait for FPGA ready to accept data signal\r
+       while ((i) && ( !(PIO_PIN_DATA_STATUS & (1<<GPIO_FPGA_NINIT) ) ) ) {\r
+               i--;\r
+       }\r
+\r
+       // crude error indicator, leave both red LEDs on and return\r
+       if (i==0){\r
+               LED_C_ON();\r
+               LED_D_ON();\r
+               return;\r
+       }\r
+\r

        if(bytereversal) {\r
                /* This is only supported for DWORD aligned images */\r
                if( ((int)FpgaImage % sizeof(DWORD)) == 0 ) {\r
        if(bytereversal) {\r
                /* This is only supported for DWORD aligned images */\r
                if( ((int)FpgaImage % sizeof(DWORD)) == 0 ) {\r


@@ -183,7 +205,7 @@ static void DownloadFPGA(const char *FpgaImage, int FpgaImageLen, int byterevers
                        /* Explanation of the magic in the above line: \r
                         * i^0x3 inverts the lower two bits of the integer i, counting backwards\r
                         * for each 4 byte increment. The generated sequence of (i++)^3 is\r
                        /* Explanation of the magic in the above line: \r
                         * i^0x3 inverts the lower two bits of the integer i, counting backwards\r
                         * for each 4 byte increment. The generated sequence of (i++)^3 is\r

-                        * 3 2 1 0 7 6 5 4 11 10 9 8 15 14 13 12 etc. pp. 
+                        * 3 2 1 0 7 6 5 4 11 10 9 8 15 14 13 12 etc. pp. \r

                         */\r
                }\r
        } else {\r
                         */\r
                }\r
        } else {\r


@@ -191,6 +213,18 @@ static void DownloadFPGA(const char *FpgaImage, int FpgaImageLen, int byterevers
                        DownloadFPGA_byte(*FpgaImage++);\r
        }\r
 \r
                        DownloadFPGA_byte(*FpgaImage++);\r
        }\r
 \r

+       // continue to clock FPGA until ready signal goes high\r
+       i=100000;\r
+       while ( (i--) && ( !(PIO_PIN_DATA_STATUS & (1<<GPIO_FPGA_DONE) ) ) ) {\r
+               HIGH(GPIO_FPGA_CCLK);\r
+               LOW(GPIO_FPGA_CCLK);\r
+       }\r
+       // crude error indicator, leave both red LEDs on and return\r
+       if (i==0){\r
+               LED_C_ON();\r
+               LED_D_ON();\r
+               return;\r
+       }\r

        LED_D_OFF();\r
 }\r
 \r
        LED_D_OFF();\r
 }\r
 \r

diff --git a/winsrc/Makefile b/winsrc/Makefile
index 96466700fa6ab54f978a67de000500f432b920c8..1c8287f871cb3916e62b870e39fa5d2291680079 100644 (file)
--- a/winsrc/Makefile
+++ b/winsrc/Makefile
@@ -1,10 +1,11 @@
 CC=cl\r
 CC=cl\r

+BASE_DIR    ?= "..\..\devkitWIN"\r

 BASE_DEFS   = /D_WIN32_WINNT=0x501 /DISOLATION_AWARE_ENABLED /D_WIN32_IE=0x600 /DWIN32_LEAN_AND_MEAN /DWIN32 /D_MT /D_CRT_SECURE_NO_WARNINGS\r
 BASE_CFLAGS = /W3 /nologo /Zi /MT /Fdobj/vc90.pdb\r
 BASE_DEFS   = /D_WIN32_WINNT=0x501 /DISOLATION_AWARE_ENABLED /D_WIN32_IE=0x600 /DWIN32_LEAN_AND_MEAN /DWIN32 /D_MT /D_CRT_SECURE_NO_WARNINGS\r
 BASE_CFLAGS = /W3 /nologo /Zi /MT /Fdobj/vc90.pdb\r

-LIB=..\..\devkitWIN\lib;%LIB%\r
+LIB         = $(BASE_DIR)\lib\r

 \r
 DEFINES  = $(BASE_DEFS)\r
 \r
 DEFINES  = $(BASE_DEFS)\r

-INCLUDES = /I..\..\devkitWIN/include\r
+INCLUDES = /I$(BASE_DIR)\include\r

 CFLAGS   = $(BASE_CFLAGS) $(INCLUDES)\r
 \r
 OBJDIR = obj\r
 CFLAGS   = $(BASE_CFLAGS) $(INCLUDES)\r
 \r
 OBJDIR = obj\r


@@ -13,7 +14,7 @@ OBJS   = $(OBJDIR)\prox.obj \
          $(OBJDIR)\gui.obj \\r
          $(OBJDIR)\command.obj\r
 \r
          $(OBJDIR)\gui.obj \\r
          $(OBJDIR)\command.obj\r
 \r

-LIBS   = user32.lib gdi32.lib setupapi.lib\r
+LIBS   = $(LIB)\user32.lib $(LIB)\gdi32.lib $(LIB)\setupapi.lib $(LIB)\libcmt.lib $(LIB)\oldnames.lib $(LIB)\kernel32.lib\r

 \r
 all: proxmark3\r
 \r
 \r
 all: proxmark3\r
 \r