CHG: the AT91C_BASE_PMC->PMC_PCER has a tendecy to be clear when set with "=", ...

diff --git a/armsrc/fpgaloader.c b/armsrc/fpgaloader.c
index 08a3866340f6229ab5a3f7b304cefaa25336a8ea..a1011ab7c3fccf635520eb8f1ae6cfbb27ff8f12 100644 (file)
--- a/armsrc/fpgaloader.c
+++ b/armsrc/fpgaloader.c
@@ -117,7 +117,7 @@ void SetupSpi(int mode)
 // Set up the synchronous serial port, with the one set of options that we
 // always use when we are talking to the FPGA. Both RX and TX are enabled.
 //-----------------------------------------------------------------------------
-void FpgaSetupSsc(void) {
+void FpgaSetupSscExt(uint8_t clearPCER) {
        // First configure the GPIOs, and get ourselves a clock.
        AT91C_BASE_PIOA->PIO_ASR =
                GPIO_SSC_FRAME  |
@@ -126,7 +126,10 @@ void FpgaSetupSsc(void) {
                GPIO_SSC_CLK;
        AT91C_BASE_PIOA->PIO_PDR = GPIO_SSC_DOUT;
 
-       AT91C_BASE_PMC->PMC_PCER |= (1 << AT91C_ID_SSC);
+       if ( clearPCER )
+               AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_SSC);
+       else
+               AT91C_BASE_PMC->PMC_PCER |= (1 << AT91C_ID_SSC);
 
        // Now set up the SSC proper, starting from a known state.
        AT91C_BASE_SSC->SSC_CR = AT91C_SSC_SWRST;
@@ -148,7 +151,9 @@ void FpgaSetupSsc(void) {
 
        AT91C_BASE_SSC->SSC_CR = AT91C_SSC_RXEN | AT91C_SSC_TXEN;
 }
-
+void FpgaSetupSsc(void) {
+       FpgaSetupSscExt(TRUE);
+}
 //-----------------------------------------------------------------------------
 // Set up DMA to receive samples from the FPGA. We will use the PDC, with
 // a single buffer as a circular buffer (so that we just chain back to

diff --git a/armsrc/fpgaloader.h b/armsrc/fpgaloader.h
index 5e5e6af65fe877d73c8e483042c903f936820e1b..49290dc070dd98aae5f57114721f05f9595dc535 100644 (file)
--- a/armsrc/fpgaloader.h
+++ b/armsrc/fpgaloader.h
@@ -14,6 +14,7 @@ void FpgaSendCommand(uint16_t cmd, uint16_t v);
 void FpgaWriteConfWord(uint8_t v);
 void FpgaDownloadAndGo(int bitstream_version);
 void FpgaGatherVersion(int bitstream_version, char *dst, int len);
+void FpgaSetupSscExt(uint8_t clearPCER);
 void FpgaSetupSsc(void);
 void SetupSpi(int mode);
 bool FpgaSetupSscDma(uint8_t *buf, int len);
@@ -28,7 +29,6 @@ void SetAdcMuxFor(uint32_t whichGpio);
 #define FPGA_BITSTREAM_LF 1
 #define FPGA_BITSTREAM_HF 2
 
-
 // Definitions for the FPGA commands.
 #define FPGA_CMD_SET_CONFREG                                           (1<<12)
 #define FPGA_CMD_SET_DIVISOR                                           (2<<12)