cvs.zerfleddert.de Git - raggedstone/blob - dhwk/source/pci/config_08h.vhd

   1 -- J.STELZNER
   2 -- INFORMATIK-3 LABOR
   3 -- 23.08.2006
   4 -- File: CONFIG_08H.VHD
   5
   6 library IEEE;
   7 use IEEE.std_logic_1164.all;
   8
   9 entity CONFIG_08H is
  10         port
  11         (
  12                 REVISION_ID :in std_logic_vector ( 7 downto 0);
  13                 CONF_DATA_08H :out std_logic_vector (31 downto 0)
  14         );
  15 end entity CONFIG_08H;
  16
  17 architecture CONFIG_08H_DESIGN of CONFIG_08H is
  18
  19  -- PCI Configuration Space Header Addr : HEX 08 --
  20
  21         constant CONF_CLASS_CODE :std_logic_vector (31 downto 8) := X"078000";--other comm. device
  22         --constant CONF_REVISION_ID :std_logic_vector ( 7 downto 0) := X"00";
  23
  24 begin
  25
  26         CONF_DATA_08H <= CONF_CLASS_CODE & REVISION_ID;
  27
  28 end architecture CONFIG_08H_DESIGN;