--- $Id: par_ser_con.vhd,v 1.3 2007-03-11 12:24:35 sithglan Exp $
+-- $Id: par_ser_con.vhd,v 1.4 2007-03-11 13:23:11 sithglan Exp $
library ieee;
use ieee.std_logic_1164.all;
process(PCI_CLOCK)
begin
- if (PCI_CLOCK'event and PCI_CLOCK = '1') then
+ if (rising_edge(PCI_CLOCK)) then
if ("0000" < COUNT) then
COUNT <= COUNT - 1;
end if;
process(PCI_CLOCK)
begin
- if (PCI_CLOCK'event and PCI_CLOCK = '1') then
+ if (rising_edge(PCI_CLOCK)) then
SYNC <= SPC_RDY_IN;
end if;
end process;