- port
- (
- PCI_CLOCK :in std_logic;
- PCI_RSTn :in std_logic;
- PCI_FRAMEn :in std_logic;
- PCI_IRDYn :in std_logic;
- PCI_IDSEL :in std_logic;
- PCI_PAR :in std_logic;
- PCI_CBEn :in std_logic_vector ( 3 downto 0);
- OE_PCI_AD :in std_logic;
- IO_DATA :in std_logic_vector (31 downto 0);
- AD_REG :out std_logic_vector (31 downto 0);
- CBE_REGn :out std_logic_vector ( 3 downto 0);
- FRAME_REGn :out std_logic;
- IRDY_REGn :out std_logic;
- IDSEL_REG :out std_logic;
- PAR_REG :out std_logic;
- PCI_AD :out std_logic_vector (31 downto 0) -- t/s
- );
+ port
+ (
+ PCI_CLOCK :in std_logic;
+ PCI_RSTn :in std_logic;
+ PCI_FRAMEn :in std_logic;
+ PCI_IRDYn :in std_logic;
+ PCI_IDSEL :in std_logic;
+ PCI_PAR :in std_logic;
+ PCI_CBEn :in std_logic_vector ( 3 downto 0);
+ OE_PCI_AD :in std_logic;
+ IO_DATA :in std_logic_vector (31 downto 0);
+ AD_REG :out std_logic_vector (31 downto 0);
+ CBE_REGn :out std_logic_vector ( 3 downto 0);
+ FRAME_REGn :out std_logic;
+ IRDY_REGn :out std_logic;
+ IDSEL_REG :out std_logic;
+ PAR_REG :out std_logic;
+ PCI_AD :out std_logic_vector (31 downto 0) -- t/s
+ );