don't rewrite .xco all the time

diff --git a/dhwk/Makefile b/dhwk/Makefile
index 703cce51897c2886a75e7d6a17d5f8714b86d998..875f05af0c6cb860fc3f6035e730692cf3790016 100644 (file)
--- a/dhwk/Makefile
+++ b/dhwk/Makefile
@@ -1,5 +1,5 @@
 PROJECT := dhwk
-CLEANFILES := fifo_generator_*.txt fifo_generator_*.vh? fifo_generator_*.tcl fifo_generator_*.pdf
+CLEANFILES := fifo_generator_*
 
 dhwk_all: ip all
 
@@ -11,7 +11,7 @@ icon.edn: icon.arg
 ila.edn: ila.arg
        $(CHIPSCOPE)/bin/lin/generate.sh ila -f=$<
 
-fifo_generator_v3_2.ngc: fifo_generator_v3_2.xco
+fifo_generator_v3_2.ngc: fifo.xco
        coregen -b $<
 
 include ../common/Makefile.common

diff --git a/dhwk/fifo.xco b/dhwk/fifo.xco
index 8dde1a2a86fb7b1ed52627dcabb7f3fde6f8edb3..22c49f370cec22aa770ca6b8772bd08b9eabbc01 100644 (file)
--- a/dhwk/fifo.xco
+++ b/dhwk/fifo.xco
@@ -1,17 +1,3 @@
-##############################################################
-#
-# Xilinx Core Generator version J.30
-# Date: Sat Mar 10 21:20:43 2007
-#
-##############################################################
-#
-#  This file contains the customisation parameters for a
-#  Xilinx CORE Generator IP GUI. It is strongly recommended
-#  that you do not manually alter this file as it may cause
-#  unexpected and unsupported behavior.
-#
-##############################################################
-#
 # BEGIN Project Options
 SET addpads = False
 SET asysymbol = False
@@ -72,5 +58,3 @@ CSET write_data_count=false
 CSET write_data_count_width=12
 # END Parameters
 GENERATE
-# CRC: c795162c
-