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Commit | Line | Data |
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da7751cb | 1 | #include <avr/io.h> |
93402c2c | 2 | #include <avr/interrupt.h> |
da7751cb MG |
3 | #include <stdio.h> |
4 | ||
5 | #include "chassis.h" | |
6 | ||
19d56e39 MG |
7 | #ifdef __AVR_ATmega16__ |
8 | #define CHASSISPORT B | |
9 | #define POWER_PIN 0 | |
10 | #define RESET_PIN 1 | |
11 | #define ACTIVE_LOW | |
12 | #else | |
13 | #error "Please add chassis power/reset-PIN information for this chip" | |
14 | #endif | |
15 | ||
16 | #define __CPORT(port) PORT##port | |
17 | #define _CPORT(port) __CPORT(port) | |
18 | #define CPORT _CPORT(CHASSISPORT) | |
19 | ||
20 | #define __CDDR(port) DDR##port | |
21 | #define _CDDR(port) __CDDR(port) | |
22 | #define CDDR _CDDR(CHASSISPORT) | |
23 | ||
93402c2c MG |
24 | static volatile int power_cnt = 0; |
25 | static volatile int reset_cnt = 0; | |
26 | ||
19d56e39 MG |
27 | static void chassis_set_pins(uint8_t pins, uint8_t state); |
28 | ||
da7751cb MG |
29 | void chassis_init() |
30 | { | |
19d56e39 MG |
31 | chassis_set_pins((1<<POWER_PIN) | (1<<RESET_PIN), 0); |
32 | CDDR |= ((1<<POWER_PIN) | (1<<RESET_PIN)); | |
93402c2c MG |
33 | |
34 | /* About 1ms */ | |
70947537 | 35 | OCR0 = ((F_CPU/64)/1000) - 1; |
93402c2c | 36 | |
70947537 | 37 | TCCR0 = ((1<<WGM01) | (1<<CS01) | (1<<CS00)); /* CTC, Prescaler 64 */ |
93402c2c MG |
38 | TIMSK |= (1<<OCIE0); |
39 | ||
19d56e39 MG |
40 | } |
41 | ||
42 | static void chassis_set_pins(uint8_t pins, uint8_t state) | |
43 | { | |
44 | #ifdef ACTIVE_LOW | |
45 | state = !state; | |
46 | #endif | |
47 | ||
48 | if(state) { | |
49 | CPORT |= pins; | |
50 | } else { | |
51 | CPORT &= ~pins; | |
52 | } | |
53 | } | |
54 | ||
55 | static void chassis_power(int msec) | |
56 | { | |
93402c2c | 57 | uint8_t old_SREG = SREG; |
19d56e39 MG |
58 | |
59 | chassis_set_pins((1<<POWER_PIN), 1); | |
60 | ||
93402c2c MG |
61 | cli(); |
62 | if (!power_cnt) | |
63 | power_cnt = msec; | |
64 | SREG = old_SREG; | |
19d56e39 MG |
65 | } |
66 | ||
67 | static void chassis_reset(int msec) | |
68 | { | |
93402c2c | 69 | uint8_t old_SREG = SREG; |
19d56e39 MG |
70 | |
71 | chassis_set_pins((1<<RESET_PIN), 1); | |
72 | ||
93402c2c MG |
73 | cli(); |
74 | if (!reset_cnt) | |
75 | reset_cnt = msec; | |
76 | SREG = old_SREG; | |
da7751cb MG |
77 | } |
78 | ||
79 | void chassis_control(unsigned char action) | |
80 | { | |
81 | #ifdef DEBUG | |
82 | printf("Chassis control 0x%02x\n", action); | |
83 | #endif | |
84 | ||
85 | switch(action) { | |
86 | case CHASSIS_ACTION_POWER_DOWN: | |
19d56e39 | 87 | chassis_power(5000); |
da7751cb MG |
88 | break; |
89 | ||
90 | case CHASSIS_ACTION_POWER_UP: | |
ed12045f | 91 | chassis_power(200); |
da7751cb MG |
92 | break; |
93 | ||
94 | case CHASSIS_ACTION_HARD_RESET: | |
ed12045f | 95 | chassis_reset(200); |
da7751cb MG |
96 | break; |
97 | ||
98 | default: | |
f9d5c6e0 | 99 | #ifdef DEBUG |
da7751cb | 100 | printf("Unimplemented chassis action 0x%02x\n", action); |
f9d5c6e0 | 101 | #endif |
da7751cb MG |
102 | break; |
103 | } | |
104 | } | |
93402c2c MG |
105 | |
106 | ISR(TIMER0_COMP_vect) | |
107 | { | |
108 | if (power_cnt) { | |
109 | power_cnt--; | |
110 | ||
111 | if (!power_cnt) | |
112 | chassis_set_pins((1<<POWER_PIN), 0); | |
113 | } | |
114 | if (reset_cnt) { | |
115 | reset_cnt--; | |
116 | ||
117 | if (!reset_cnt) | |
118 | chassis_set_pins((1<<RESET_PIN), 0); | |
119 | } | |
120 | } |