ARM code cleanup (lfops)

diff --git a/armsrc/apps.h b/armsrc/apps.h
index 95080eaec7f77d2c4b3e164383948fe02a9cff3c..fba62365b9678484207de769f796f537e059aab4 100644 (file)
--- a/armsrc/apps.h
+++ b/armsrc/apps.h
@@ -25,7 +25,7 @@ void ToSendStuffBit(int b);
 void ToSendReset(void);\r
 void ListenReaderField(int limit);\r
 void AcquireRawAdcSamples125k(BOOL at134khz);\r
 void ToSendReset(void);\r
 void ListenReaderField(int limit);\r
 void AcquireRawAdcSamples125k(BOOL at134khz);\r

-void DoAcquisition125k(BOOL at134khz);\r
+void DoAcquisition125k(void);\r

 extern int ToSendMax;\r
 extern BYTE ToSend[];\r
 extern DWORD BigBuf[];\r
 extern int ToSendMax;\r
 extern BYTE ToSend[];\r
 extern DWORD BigBuf[];\r


@@ -71,9 +71,8 @@ void SetAdcMuxFor(DWORD whichGpio);
 \r
 /// lfops.h\r
 void AcquireRawAdcSamples125k(BOOL at134khz);\r
 \r
 /// lfops.h\r
 void AcquireRawAdcSamples125k(BOOL at134khz);\r

-void DoAcquisition125k(BOOL at134khz);\r

 void ModThenAcquireRawAdcSamples125k(int delay_off,int period_0,int period_1,BYTE *command);\r
 void ModThenAcquireRawAdcSamples125k(int delay_off,int period_0,int period_1,BYTE *command);\r

-void ReadTItag();\r
+void ReadTItag(void);\r

 void WriteTItag(DWORD idhi, DWORD idlo, WORD crc);\r
 void AcquireTiType(void);\r
 void AcquireRawBitsTI(void);\r
 void WriteTItag(DWORD idhi, DWORD idlo, WORD crc);\r
 void AcquireTiType(void);\r
 void AcquireRawBitsTI(void);\r

diff --git a/armsrc/lfops.c b/armsrc/lfops.c
index 6c9a36f7e51f42019173256eef92c3001f1251a5..eeaa5782948173f2cf6af575551d4915e1dc2b11 100644 (file)
--- a/armsrc/lfops.c
+++ b/armsrc/lfops.c
@@ -13,13 +13,12 @@ int sprintf(char *dest, const char *fmt, ...);
 \r
 void AcquireRawAdcSamples125k(BOOL at134khz)\r
 {\r
 \r
 void AcquireRawAdcSamples125k(BOOL at134khz)\r
 {\r

-       if(at134khz) {\r
+       if (at134khz)\r

                FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz\r
                FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz\r

-               FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);\r
-       } else {\r
+       else\r

                FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz\r
                FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz\r

-               FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);\r
-       }\r
+\r
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);\r

 \r
        // Connect the A/D to the peak-detected low-frequency path.\r
        SetAdcMuxFor(GPIO_MUXSEL_LOPKD);\r
 \r
        // Connect the A/D to the peak-detected low-frequency path.\r
        SetAdcMuxFor(GPIO_MUXSEL_LOPKD);\r


@@ -31,37 +30,37 @@ void AcquireRawAdcSamples125k(BOOL at134khz)
        FpgaSetupSsc();\r
 \r
        // Now call the acquisition routine\r
        FpgaSetupSsc();\r
 \r
        // Now call the acquisition routine\r

-       DoAcquisition125k(at134khz);\r
+       DoAcquisition125k();\r

 }\r
 \r
 // split into two routines so we can avoid timing issues after sending commands //\r
 }\r
 \r
 // split into two routines so we can avoid timing issues after sending commands //\r

-void DoAcquisition125k(BOOL at134khz)\r
+void DoAcquisition125k(void)\r

 {\r
        BYTE *dest = (BYTE *)BigBuf;\r
        int n = sizeof(BigBuf);\r
        int i;\r
        char output_string[64];\r
        \r
 {\r
        BYTE *dest = (BYTE *)BigBuf;\r
        int n = sizeof(BigBuf);\r
        int i;\r
        char output_string[64];\r
        \r

-       memset(dest,0,n);\r
+       memset(dest, 0, n);\r

        i = 0;\r
        for(;;) {\r
                if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {\r
                        AT91C_BASE_SSC->SSC_THR = 0x43;\r
                        LED_D_ON();\r
                }\r
        i = 0;\r
        for(;;) {\r
                if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {\r
                        AT91C_BASE_SSC->SSC_THR = 0x43;\r
                        LED_D_ON();\r
                }\r

-               if(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {\r
+               if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {\r

                        dest[i] = (BYTE)AT91C_BASE_SSC->SSC_RHR;\r
                        i++;\r
                        LED_D_OFF();\r
                        if (i >= n) break;\r
                }\r
        }\r
                        dest[i] = (BYTE)AT91C_BASE_SSC->SSC_RHR;\r
                        i++;\r
                        LED_D_OFF();\r
                        if (i >= n) break;\r
                }\r
        }\r

-       sprintf(output_string, "read samples, dest[0]=%x dest[1]=%x at134khz=%d",\r
-               dest[0], dest[1], at134khz);\r
+       sprintf(output_string, "read samples, dest[0]=%x dest[1]=%x",\r
+               dest[0], dest[1]);\r

        DbpString(output_string);\r
 }\r
 \r
        DbpString(output_string);\r
 }\r
 \r

-void ModThenAcquireRawAdcSamples125k(int delay_off,int period_0,int period_1,BYTE *command)\r
+void ModThenAcquireRawAdcSamples125k(int delay_off, int period_0, int period_1, BYTE *command)\r

 {\r
        BOOL at134khz;\r
 \r
 {\r
        BOOL at134khz;\r
 \r


@@ -70,18 +69,17 @@ void ModThenAcquireRawAdcSamples125k(int delay_off,int period_0,int period_1,BYT
        SpinDelay(2500);\r
        \r
        // see if 'h' was specified\r
        SpinDelay(2500);\r
        \r
        // see if 'h' was specified\r

-       if(command[strlen((char *) command) - 1] == 'h')\r
-               at134khz= TRUE;\r
+       if (command[strlen((char *) command) - 1] == 'h')\r
+               at134khz = TRUE;\r

        else\r
        else\r

-               at134khz= FALSE;\r
+               at134khz = FALSE;\r

 \r
 \r

-       if(at134khz) {\r
+       if (at134khz)\r

                FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz\r
                FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz\r

-               FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);\r
-       } else {\r
+       else\r

                FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz\r
                FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz\r

-               FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);\r
-       }\r
+\r
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);\r

 \r
        // Give it a bit of time for the resonant antenna to settle.\r
        SpinDelay(50);\r
 \r
        // Give it a bit of time for the resonant antenna to settle.\r
        SpinDelay(50);\r


@@ -92,38 +90,34 @@ void ModThenAcquireRawAdcSamples125k(int delay_off,int period_0,int period_1,BYT
        FpgaSetupSsc();\r
 \r
        // now modulate the reader field\r
        FpgaSetupSsc();\r
 \r
        // now modulate the reader field\r

-       while(*command != '\0' && *command != ' ')\r
-               {\r
+       while(*command != '\0' && *command != ' ') {\r

                FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);\r
                LED_D_OFF();\r
                SpinDelayUs(delay_off);\r
                FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);\r
                LED_D_OFF();\r
                SpinDelayUs(delay_off);\r

-               if(at134khz) {\r
+               if (at134khz)\r

                        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz\r
                        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz\r

-                       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);\r
-               } else {\r
+               else\r

                        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz\r
                        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz\r

-                       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);\r
-               }\r
+\r
+               FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);\r

                LED_D_ON();\r
                LED_D_ON();\r

-               if(*(command++) == '0') {\r
+               if(*(command++) == '0')\r

                        SpinDelayUs(period_0);\r
                        SpinDelayUs(period_0);\r

-               } else {\r
+               else\r

                        SpinDelayUs(period_1);\r
                        SpinDelayUs(period_1);\r

-               }\r
-               }\r
+       }\r

        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);\r
        LED_D_OFF();\r
        SpinDelayUs(delay_off);\r
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);\r
        LED_D_OFF();\r
        SpinDelayUs(delay_off);\r

-       if(at134khz) {\r
+       if (at134khz)\r

                FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz\r
                FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz\r

-               FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);\r
-       } else {\r
+       else\r

                FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz\r
                FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz\r

-               FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);\r
-       }\r
+\r
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);\r

 \r
        // now do the read\r
 \r
        // now do the read\r

-       DoAcquisition125k(at134khz);\r
+       DoAcquisition125k();\r

 }\r
 \r
 /* blank r/w tag data stream\r
 }\r
 \r
 /* blank r/w tag data stream\r


@@ -135,7 +129,7 @@ void ModThenAcquireRawAdcSamples125k(int delay_off,int period_0,int period_1,BYT
 \r
 [5555fe852c5555555555555555fe0000]\r
 */\r
 \r
 [5555fe852c5555555555555555fe0000]\r
 */\r

-void ReadTItag()\r
+void ReadTItag(void)\r

 {\r
        // some hardcoded initial params\r
        // when we read a TI tag we sample the zerocross line at 2Mhz\r
 {\r
        // some hardcoded initial params\r
        // when we read a TI tag we sample the zerocross line at 2Mhz\r


@@ -311,7 +305,7 @@ void AcquireTiType(void)
 \r
        // steal this pin from the SSP and use it to control the modulation\r
        AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT;\r
 \r
        // steal this pin from the SSP and use it to control the modulation\r
        AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT;\r

-       AT91C_BASE_PIOA->PIO_OER        = GPIO_SSC_DOUT;\r
+       AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;\r

 \r
        AT91C_BASE_SSC->SSC_CR = AT91C_SSC_SWRST;\r
        AT91C_BASE_SSC->SSC_CR = AT91C_SSC_RXEN | AT91C_SSC_TXEN;\r
 \r
        AT91C_BASE_SSC->SSC_CR = AT91C_SSC_SWRST;\r
        AT91C_BASE_SSC->SSC_CR = AT91C_SSC_RXEN | AT91C_SSC_TXEN;\r